• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1991년도 한국자동제어학술회의논문집(국내학술편); KOEX, Seoul; 22-24 Oct. 1991
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• pp.322-326
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• 1991

A real time process control package was developed in an INTEL 80386 based PC and MS OS/2 environment using MS-C and MS-FORTRAN. RTACS(Real Time Advanced Control System), process control computer software for distributed or centralized architectures, is a package which meets functional requirements specified for typical continuous process applications like chemical processes. The package consists of 5 parts, which are DB(data base), OCF(Operator Console Functions), CL (Control logic Library), MSM(Multitasking and Scheduling, Manager) and UAI(User Applications Interface), based upon a table and function block architecture to improve the system performance.

• 전자통신동향분석
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• 제35권2호
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• pp.50-68
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• 2020

Distributed Ledger Technology (DLT) refers to a process and related technologies that enable a person to safely suggest, verify, and record state changes (usually updates) to synchronize ledgers distributed across network nodes. DLTs are becoming increasingly important as data management requirements evolve. Therefore, they need to understand the current state of standards (such as distributed storage and access technologies) to address future requirements. This paper provides ITU-T FG-DLT standard activities, such as standardization ization trends, use cases, reference architectures, platform evaluation criteria and future prospects.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2006년도 하계종합학술대회
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• pp.729-730
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• 2006

multimedia applications has been targeted for exploiting single instruction multiple data extensions to instruction architectures for the most of the modern microprocessor. In this paper, the newest video coding standard, H.264/AVC baseline profile decoder has been implemented and optimized exploiting INTEL MMX technology to show the overall system speedup by the SIMD style coding

• Journal of Information Processing Systems
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• 제17권4호
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• pp.801-817
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• 2021

Network virtualization technologies have played efficient roles in deploying cloud, Internet of Things (IoT), big data, and 5G network. We have conducted a survey on network virtualization technologies, such as software-defined networking (SDN), network functions virtualization (NFV), and network virtualization overlay (NVO). For each of technologies, we have explained the comprehensive architectures, applied technologies, and the advantages and disadvantages. Furthermore, this paper has provided a summarized view of the latest research works on challenges and solutions of security issues mainly focused on DDoS attack and encryption.

• 천문학회보
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• 제45권1호
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• pp.49.4-50
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• 2020

We introduce a novel method for reconstructing the projected matter distributions of galaxy clusters with weak-lensing (WL) data based on convolutional neural network (CNN). We control the noise level of the galaxy shear catalog such that it mimics the typical properties of the existing Subaru/Suprime-Cam WL observations of galaxy clusters. We find that our mass reconstruction based on multi-layered CNN with architectures of alternating convolution and trans-convolution filters significantly outperforms the traditional mass reconstruction methods.

• 한국음향학회지
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• 제8권5호
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• pp.95-101
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• 1989

일반 DSP들은 새로운 algorithm 및 응용 system의 개발을 위해서 전용 development system 및 simulator가 필수 불가결의 요소이다. 그러나 대부분 development system은 일반화된 내부 구조에 의해 그 유연성에 한계가 존재한다. 본 연구에서는 A/D입력과 D/A출력 data를 저장하는 buffer의 길이를 program에 의해 1 sample 단위부터 최대 2K sample 단위까지 가변할 수 있도록 하고, 이들 buffer도 2중 구조로 하여 연속 신호의 처리가 가능도록 한 DSP평가용 system을 개발하였다.

• 한국CDE학회논문집
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• 제3권1호
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• pp.48-56
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• 1998

Finite element analysis is very important in the design and analysis of mechanical engineering. The process of FEA encompasses shape modeling, mesh generation, matrix solving and post-processing. Some of these processes can be tightly integrated with the current software architectures and data sharing mode. However, complete integration of all the FEA process itself and the integration to the manufacturing processes is almost impossible in the current practice. The barriers to this problem are inconsistent data format and the enterprise-wise software integration technology. In this research, the information model based on STEP AP209 was chosen for handling finite element analysis data. The international standard for the FEA data can bridge the gap between design, analysis and manufacturing processes. The STEP-based FEA system can be further tightly integrated to the distributed software and database environment using CORBA technology. The prototype FEA system DICESS is implemented to verify the proposed concepts.

• 한국정보처리학회:학술대회논문집
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• 한국정보처리학회 2010년도 추계학술발표대회
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• pp.1632-1634
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• 2010

고성능 재구성형 어레이 아키텍처는 애플리케이션에 내재된 병렬성을 충분히 활용하도록 풍부한 하드웨어 리소스로 구성되어 있다. 이러한 하드웨어 리소스는 소프트웨어 파이프라이닝 기반 코드할당 기법을 통하여 사용된다. 이러한 코드할당 기법은 기존의 소프트웨어 파이프라이닝 기법에 FPGA 에서의 라우팅 & 위치선정기법이 연결된 형식으로 구성된다. 이러한 기존의 연구들은 데이터 흐름 (data flow)을 단순한 형태로 가정하여 개발되었다. 따라서 루프 코드 펼침 (loop unrolling)에 따라서 발생되는 데이터 복사에 의한 흐름 (copy flow)은 코드 매핑할 때 고려하지 않기 때문에 소프트웨어 파이프라이닝 적용시 네트웍 리소스의 중복사용으로 인한 데이터 충돌문제(data congestion)로 Minimum Initiation Interval (MII)증가에 따르는 성능 저하가 발생할 수 있다. 본 연구에서는 다양한 데이터 복사 흐름까지 고려하도록 데이터 의존도 그래프 (Data Dependence Graph, DDG)를 확장하여 스케쥴링 단계에서 데이터 충돌 지연에 의한 MII 증가를 방지하여 최적의 시스템 성능을 얻도록 코드 할당 기법을 개발하였다.

• 전자통신동향분석
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• 제38권5호
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• pp.23-33
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• 2023

With the widespread demand from data-intensive tasks such as machine learning and large-scale databases, the amount of data processed in modern computing systems is increasing exponentially. Such data-intensive tasks require large amounts of memory to rapidly process and analyze massive data. However, existing computing system architectures face challenges when building large-scale memory owing to various structural issues such as CPU specifications. Moreover, large-scale memory may cause problems including memory overprovisioning. The Compute Express Link (CXL) allows computing nodes to use large amounts of memory while mitigating related problems. Hence, CXL is attracting great attention in industry and academia. We describe the overarching concepts underlying CXL and explore recent research trends in this technology.

• ETRI Journal
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• 제42권4호
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• pp.608-618
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• 2020

We present a novel GPU-based ray-casting algorithm for volume rendering of unstructured grid data. Our volume rendering system uses a ray-casting method that guarantees accurate rendering results. We also employ the per-pixel intersection list concept in the Bunyk algorithm to guarantee an accurate result for non-convex meshes. For efficient memory access for the lists on the GPU, we represent the intersection lists for all faces as an array with our novel construction algorithm. With the intersection lists, we perform ray-casting on a GPU, and a GPU thread handles each ray. To increase ray-coherency in a thread block and improve memory access efficiency, we extend a prior image-tile-based work distribution method to fit modern GPU architectures. We also show that a prior approach using a per-thread local buffer to reduce redundant computation is not appropriate for modern GPU architectures. Instead, we take an on-demand calculation strategy that achieves better performance even though it allows duplicate computations. We applied our method to three unstructured grid datasets with different characteristics. With a GPU, our method achieved up to 36.5 times higher performance for the ray-casting process and 19.7 times higher performance for the whole volume rendering process compared with the Bunyk algorithm using a CPU core. Also, our approach showed up to 8.2 times higher performance than a GPU-based cell projection method while generating more accurate rendering results. These results demonstrate the efficiency and accuracy of our method.