• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2007.06a
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• pp.157-160
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• 2007

System realization and video watermarking using spatial and interframe information is presented in this paper. The system is constructed with DSP processor to process compression and watermark algorithm with real time. Video watermark algorithm is used the watermark insertion using the spatial and interframe. As a results, the processing time of D1 image per frame is 32.1msec in DSP.

• Journal of the Korea Society of Computer and Information
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• v.10 no.5 s.37
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• pp.313-322
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• 2005

In this paper, we implement and verify performance monitor for parallel signal processing system, using DSP Starter Kit(DSK) of which the basic Processor is TMS302C6711 chip. The key ideas of this performance monitor is, using Real Time Data Exchange(RTDX) for the Purpose of real-time data transfer and function of DSP/BIOS, the ability to measure the Performance measure like DSP workload, memory usage, and bridge traffic. In the simulation, FFT, 2D FFT, Matrix Multiplication, and Fir Filter, which are widely used DSP algorithms, have been employed. Using performance monitor and Code Composer Studio from Texas Instrument(Tl) , the result has been recorded according to different frequencies, data sizes, and buffer sizes for a single wave file. The accuracy of our performance monitor has been verified by comparing those recorded results.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2000.11b
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• pp.43-48
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• 2000

This paper introduces MPEG-2 AAC codec system fur digital audio broadcasting. This system consists of encoder and decoder, and this system provides MPEG-2 system multiplexing and demultiplexing functions. Four DSPs are adopted fur encoder and three DSPs fur decoder. Each DSP processes system control, I/O control, and audio signal processing, multiplexing and demultiplexing. This paper also discusses about some near future estimations related to DAB system and services. And at the end of this paper describes about future development plans.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.201-204
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• 2006

A system realization for real time DVR system with robust video watermarking algorithm against is attacked various is presented in this paper. The main system is composed of DSP processor and robust video watermarking to be processed at real time on image data and algorithm of the DVR system. The experimental result shows that the processing time takes about 2.5ms on the D1 size image per frame.

• Journal of the Korean Institute of Intelligent Systems
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• v.18 no.3
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• pp.323-328
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• 2008

This paper presents a Digital Signal Processor achieving high through-put for both decision intensive and computation intensive tasks. The proposed processor employees a multiplier, two ALU and load/store. Unit as operational units. Those four units are controlled and works parallel by superscalar control scheme, which is different from prior DSP architecture. The performance evaluation was done by implementing AC-3 decoding algorithm and 37.8% improvement was achieved. This study is valuable especially for the consumer electronics applications, which require very low cost.

• Journal of IKEEE
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• v.26 no.2
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• pp.280-286
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• 2022

This paper presents implementation of rapid control prototype (RCP) for permanent magnet synchronous machines (PMSMs) using a digital signal processor (DSP) and the PLECS software. By utilization of auto code generation function in the PLECS, a current vector control algorithm for a PMSM drive system using a DSP as a control processor can be developed more efficiently. In this paper, a background of a model based design (MBD) and real time control are reviewed. Also, commercial RCP products compatible with DSP boards are introduced. At the end of the paper, experimental implementation of RCP for a PMSM drive is presented.

• Journal of the Korea Society of Computer and Information
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• v.11 no.2 s.40
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• pp.35-42
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• 2006

In this paper we implement a new simulator for performance analysis of a parallel digital signal processing distributed shared memory multiprocessor systems. using Parsec The key idea of this simulator is suitable in simulation of system that uses DMA function of TMS320C6701 DSP chip and local memory which have fast access time. Also, because correction of performance parameter and reconfiguration for hardware components are easy, we can analyze performance of system in various execution environments. In the simulation, FET, 2D FET, Matrix Multiplication. and Fir Filter, which are widely used DSP algorithms. have been employed. Using our simulator, the result has been recorded according to different the number of processor, data sizes, and a change of hardware element. The performance of our simulator has been verified by comparing those recorded results.

• The Transactions of the Korean Institute of Power Electronics
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• v.6 no.1
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• pp.27-33
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• 2001

This paper presents a digital instrument for a DSP based power quality analysis in three phase power system where current waveform is non-sinusoidal. it is based on stand alone type TMS320C31 DSP(digital signal processor)board and on a special high-speed data acquisition system. Power quality of low power motor drives are analyzed and processed by using a simple average power algorithm, and result of power analysis are displayed by LCD in the proposed system. This paper also goes on to discuss the performance of an instrument prototype, both in terms of accuracy and speed of measurement under the transient and steady state condition.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2000.10a
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• pp.539-543
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• 2000

본 논문은 7MS320C6x01 DSP프로세서를 이용하여 원격실시간 모니터링 시스템을 설계한 연구로서 시스템구성은 성능, 규격 및 기능 둥의 조건을 수용하는 RFPM, SPM, MPM 모듈로 구성되었다. 실험 및 성능테스트는 WCDMA와 비동기 IMT-2000시스템과 연계하여 측정하였다. 측정결과 40MHz의 입력주파수에 대해 10dB 정도의 노이즈가 분포되었고 요구조건에 부합하는 통합형 원격 기지국 모니터링 운용보전에 적용하였다.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.10
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• pp.3859-3865
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• 2010

Modeling a virtual reader and tags, the emulator system is realized by using a commercial signal generation device to make signal, a data collection equipment, and DSP board. By using a Virtual UHF RFID (860 ~ 960 [MHz]) reader/tags module, a developed RFID reader, protocol of tag, and properties of RF support to provide the way how to verify the suitability to international standards (ISO 18000-6 Type C, EPCglobal C1G2). In this paper, to implement a proposed model reader and tag model, Visual DSP is applied by using DSP board, composing the system's signal generators, signal analyzers and performance verification, the target readers or tags, RFID emulator control computesr and control programs.