• Journal of Power Electronics
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• v.3 no.4
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• pp.224-229
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• 2003

The rapid expansion of small computers over the last 10-odd years has brought about great changes in the circumstances affecting UPSs. There are strong demands that UPSs become much smaller and lighter, and more economical, which has resulted in the wide application of the circuit topology without transformer. A disadvantage of such UPS topology is that the DC link voltage is very high, which invites decreased reliability and increased cost of battery bank. Some circuit configurations were proposed to eliminate this disadvantage, but they still had problems. In this paper, a novel circuit configuration which eliminates these problems is proposed and evaluated by the experimental results of prototype UPS.

• Proceedings of the KIPE Conference
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• 2015.07a
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• pp.307-308
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• 2015

본 논문은 3-레벨 T-type 인버터의 새로운 중성점 전압 제어 기법을 제안한다. 3-레벨 T-type 인버터는 dc-link 전압을 커패시터 2개로 나누어 사용하며 두 커패시터간의 전압 차이로 인해 출력 전압의 왜곡을 야기한다. 공간 벡터 변조 기법으로 P-type과 N-type 전압 벡터의 스위칭 시간을 조절함으로써 복잡한 수학적 모델링 없이 중성점 전압을 제어하는 간단한 방식을 제안하였다. 제안된 중성점 제어 알고리즘을 설명하고, 10kW급 3-레벨 T-type 인버터 시제품을 제작하여 본 논문에서 제안하는 방식에 대한 타당성을 검증하였다.

• Transactions on Electrical and Electronic Materials
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• v.18 no.3
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• pp.129-135
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• 2017

This paper introduces a design and a simulation of a hybrid active power filter (HAPF) for harmonics reduction given an ideal supply source. The synchronous reference frame method has been used here to identify the reference currents. The proposed HAPF uses a new artificial- intelligence technique called Particle Swarm Optimization (PSO) for tuning the parameters of a proportional and integral controller called PI-PSO. The PI-PSO controller is used to archive optimality for the DC-link voltage of the HAPF-inverter. The hysteresis non-linear current control method is used in this approach to compare the extracted reference and the actual currents in order to generate the pulse gate required for the HAPF. Results obtained by simulations with Matlab/Simuling show that the proposed approach is very flexible and effective for eliminating harmonic currents generated by the non-linear load with the HAPF based PSO tuning.

• Journal of Power Electronics
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• v.10 no.1
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• pp.79-84
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• 2010

This paper presents a grid connected photo-voltaic system using a quasi-Z-source inverter (QZSI) for power stage reduction. The power stage can be reduced because of an additional shoot-through stage which is a characteristic of QZSI. Therefore, by utilizing a QZSI the system's efficiency can be increased. In this paper, for applying a QZSI to a PV system, control methods such as maximum power point tracking (MPPT), point of common coupling (PCC) current control and PWM are studied and verified through simulation and experiment. In order to explain the above controllers, the characteristics of a QZSI are first analyzed. Then the MPPT control technique with a modified P&O method, the PCC current control for the regulation of the dc-link capacitor voltage and the PWM methods for the proposed system are explained. The feasibility of the proposed algorithm is verified through simulation and experiment with a 3kW system.

• The Transactions of the Korean Institute of Power Electronics
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• v.3 no.4
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• pp.365-374
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• 1998

The SHE(Selected Harmonic Elimination) PWM scheme which eliminates specific lower order harmonics can generate h high quality output waveforms in 3-level PWM inverters. However. its application has limited since SHE switching a angles cannot be calculated on-line by a microprocessor-implemented control system. Based on off-line optimization. in which multiple SHE solutions were found and analysed for 2 to 5 switching angles per quarter in the 3-level SHE PWM pattern. this paper presents an algebraic algorithm for an ordinary microprocessor to calculate approximate SHE S switching angles on-line with such high resolution that it makes no practical difference between the accurate and the a approximate SHE switching angles. By employing the variable of the dc-link voltage Vdc' the proposed SHE PWM p pattern can ideally compensate the dc input fluctuation together with selected harmonics eliminated.

• Journal of Electrical Engineering and Technology
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• v.12 no.5
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• pp.1872-1882
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• 2017

Medium voltage drive systems driven by high-power multi-level inverters operating at low switching frequency can reduce the switching losses of the power device and increase the output power. Employing subsection synchronous current harmonic minimum pulse width modulation (CHMPWM) technique can maintain the total harmonic distortion of current at a very low level. It can also reduce the losses of the system, improve the system control performance and increase the efficiency of DC-link voltage accordingly. This paper proposes a subsection synchronous CHMPWM approach of active neutral point clamped five-level (ANPC-5L) inverter under low switching frequency operation. The subsection synchronous scheme is obtained by theoretical calculation based on the allowed maximum switching frequency. The genetic algorithm (GA) is adopted to get the high-precision initial values. So the expected switching angles can be achieved with the help of sequential quadratic programming (SQP) algorithm. The selection principle of multiple sets of the switching angles is also presented. Finally, the validity of the theoretical analysis and the superiority of the CHMPWM are verified through both the simulation results and experimental results.

• Journal of Power Electronics
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• v.15 no.4
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• pp.939-950
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• 2015

A single-stage AC-AC converter has been designed for a wind energy conversion system (WECS) that eliminates multistage operation and DC-link filter elements, thus resolving size, weight, and reliability issues. A simple switching strategy is used to control the switches that changes the variable-frequency AC output of an electrical generator to a constant-frequency supply to feed into a distributed electrical load/grid. In addition, a modified random sinusoidal pulse width modulation (RSPWM) technique has been developed for the designed converter to make the overall system more efficient by increasing generating power capacity and reducing the effects of inter-harmonics and sub-harmonics generated in the WECS. The technique uses carrier and reference waves of variable switching frequency to calculate the firing angles of the switches of the converter so that the three-phase output voltage of the converter is very close to a sine wave with reduced THD. A comparison of the performance of the proposed RSPWM technique with the conventional SPWM demonstrated that the power generated by a turbine in the proposed approximately increased by 5% to 10% and THD reduces by 40% both in voltage and current with respect to conventional SPWM.

• The Transactions of the Korean Institute of Power Electronics
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• v.8 no.1
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• pp.56-63
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• 2003

This paper studies that torque model considered with decaying phase back-EMF is different In conduction and commutation period and analyzes the torque pulsation components mathematically. In this paper, it is proposed a novel method to suppress torque pulsation due to commutation time. First, it propose commutation delay time control method, which is to compensate current slope of rising phase and decaying phase to control commutation time. Current ripple is minimized at non-commutating current and torque ripple is reduced below critical speed range that dc link voltage is the same as four times of back-EMF voltage. However, torque ripple still exists due to the relation with back-EMF and commutating current and it is increased on a large scale above critical speed range, especially. Secondly, proposed method is commutation time control, which is considered with torque pulsation due to the relation of back-EMF and commutating current. Through the proposed method, the torque pulsation can be minimized in the whole speed range as well as range over critical speed.

• Journal of Power Electronics
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• v.18 no.2
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• pp.558-572
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• 2018

In addition to its modular nature, a Hybrid Modular Multilevel Converter (HMMC) assembled from half-bridge and full-bridge sub-modules, is able to block DC faults with a minimum number of switching devices, which makes it attractive for high power applications. This paper introduces a control strategy based on the Root-Least Square (RLS) algorithm to estimate the capacitor voltages instead of using direct measurements. This action eliminates the need for voltage transducers in the HMMC sub-modules and the associated communication link with the central controller. In addition to capacitor voltage balancing and suppression of circulating currents, a fault tolerant control unit (FTCU) is integrated into the proposed strategy to modify the parameters of the HMMC controller. On advantage of the proposed FTCU is that it does not need extra components. Furthermore, a fault detection unit is adapted by utilizing a hybrid estimation scheme to detect sub-module faults. The behavior of the suggested technique is assessed using PSCAD offline simulations. In addition, it is validated using a real-time digital simulator connected to a real time controller under various normal and fault conditions. The proposed strategy shows robust performance in terms of accuracy and time response since it succeeds in stabilizing the HMMC under faults.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• v.11B no.3
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• pp.112-118
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• 2001

In the near future, the voltage of power system for passenger vehicle will be changed to 42V from existing 14V./ Because of increasing power and voltage ratings used in the vehicle the motor drive system has high switching dv/dt and it generates electromagnetic interference (EMI) To solve these problems multi-level inverter system may be used The feature of multi-level inverter is the output voltage to be synthesized from several levels of voltage Because of this feature high switching dv/dt and EMI can be reduced in the multi-level inverter system But as the number of level is increased manufacturing cost is getting expensive and system size is getting large. Because of these disadvantages the application of multi-level inverter has been restricted only to high power drives. The method to reduce manufacturing cost and system size is to integrate circuit of multi-level inverter into a few chips But isolated power supply and signal isolation circuit using transformer or opto-coupler for drive circuit are obstacles to implement the integrated circuit (IC) In this paper a drive circuit of 4-level inverter suitable for integration to hybrid or one chip is proposed In the proposed drive circuit DC link voltage is used directly as the power source of each gate drive circuit NPN transistors and PNP transistors are used to isolate to transfer the control signals. So the proposed drive circuit needs no transformers and opto-couplers for electrical isolation of drive circuit and is constructed only using components to be implemented on a silicon wafer With th e proposed drive circuit 4- level inverter system will be possible to be implemented through integrated circuit technology Using the proposed drive circuit 4- level inverter system is constructed and the validity and characteristics of the proposed drive circuit are proved through the experiments.