• Title/Summary/Keyword: DC gain

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0.6~2.0 GHz Wideband Active Balun Using Advanced Phase Correction Architecture (진화된 위상보정 구조를 갖는 0.6~2.0 GHz 광대역 Active Balun 설계)

  • Park, Ji An;Jin, Ho Jeong;Cho, Choon Sik
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.25 no.3
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    • pp.289-295
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    • 2014
  • In this paper a wideband active balun using advanced phase correction architecture is proposed. The proposed active balun is constructed with each different architecture of active balun combined with the cascode architecture to improve phase correction performance compared with conventional phase correction techniques. Operating over 0.6~2.0 GHz band, the proposed balun shows $10^{\circ}$ of phase error and 2 dB of gain error with 7 mW power consumption from 1.8 V supply voltage.

Microwave Dielectric Properties of Ferroelectric PZT Thin Films (PZT 강유전체 박막의 마이크로파 유전특성)

  • Kwak, Min-Hwan;Moon, Seong-Eon;Ryu, Han-Cheol;Kim, Young-Tae;Lee, Sang-Seok;Lee, Su-Jae
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07b
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    • pp.719-722
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    • 2003
  • Ferroelectric $Pb(Zr_{1-x}Ti_x)O_3$ (PZT) films were deposited on (001) MgO single crystals using sol-gel method. Structural properties and surface morphologies of PZT films were investigated using an X-ray diffractometer and a scanning electron microscopy, respectively. The dielectric properties of PZT films were investigated with the dc bias field using interdigitated capacitors (IDC) which were fabricated on PZT films using a thick metal layer by photolithography and dry etching process. The small signal dielectric properties of PZT films were calculated by a modified conformal mapping method with low and high frequency data, such as capacitance measured by an impedance gain/phase analyzer at 100 kHz and reflection coefficient (S-parameter) measured by a HP 8510C vector network analyzer at 1 -20 GHz. The IDC on PZT films exhibited about 67% of capacitance change with an electric field of 135 kV/cm at 10 GHz. These PZT thin films can be applied to tunable microwave devices such as phase shifters, tunable resonators and tunable filters.

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A low-Gain Error Amplifier for Common-Mode Feedback Circuit (Common Mode Feedback 회로를 위한 저 증폭도 에러증폭기)

  • 정근정;노정진
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.9
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    • pp.714-723
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    • 2003
  • An effective technique to increase the signal swing and reduce noise is to use fully-differential -circuits. However, design of a common-mode feedback (CMFB) circuit that stabilizes the common-mode output level is essential. In this paper, a general description is given to fully-differential amplifiers with their CMFB loops, then a new error amplifier that is just composed of transistors and stabilizes the DC output level is proposed. We designed a simple and efficient bias circuit that allows the stability and maximum input swing. Simulation result shows the enhanced phase margin and increased differential-mode input swing with a proposed error amplifier.

4H-SiC Planar MESFET for Microwave Power Device Applications

  • Na, Hoon-Joo;Jung, Sang-Yong;Moon, Jeong-Hyun;Yim, Jeong-Hyuk;Song, Ho-Keun;Lee, Jae-Bin;Kim, Hyeong-Joon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.5 no.2
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    • pp.113-119
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    • 2005
  • 4H-SiC planar MESFETs were fabricated using ion-implantation on semi-insulating substrate without recess gate etching. A modified RCA method was used to clean the substrate before each procedure. A thin, thermal oxide layer was grown to passivate the surface and then a thick field oxide was deposited by CVD. The fabricated MESFET showed good contact properties and DC/RF performances. The maximum oscillation frequency of 34 GHz and the cut-off frequency of 9.3 GHz were obtained. The power gain was 10.1 dB and the output power of 1.4 W was obtained for 1 mm-gate length device at 2 GHz. The fabricated MESFETs showed the charge trapping-free characteristics and were characterized by the extracted small-signal equivalent circuit parameters.

통신위성 전력제어 및 분배장치 설계 및 해석

  • Choi, Jae-Dong
    • Aerospace Engineering and Technology
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    • v.2 no.1
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    • pp.108-116
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    • 2003
  • This research presents the design and analysis of PCDU(Power Control & Distribution Unit) of communication satellite. The PCDU of a spacecraft must provide adequate power to each subsystem and payload during mission life, and it also needs high reliability and performance in space environment. A control circuit of the PCDU include bus sensing and filter circuits, error signal amplification circuit, error compensation circuit of SAS(Shunt Assembly Switch) and BPC(Battery Power Converter). The phase margin and DC gain for the designed circuits are analyzed through the frequency response characteristics of the compensated control circuit. And also the transfer function of the battery power converter circuit are discussed at the battery CCCM(Charge Continuous Conduction Mode) and battery C/DCCM(Continuous/Discontinuous Conduction Mode).

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A New Design-for-Testability Circuit for Low Noise Amplifiers (저잡음 증폭기를 위한 새로운 구조의 검사용 설계회로)

  • Ryu Jee-Youl;Noh Seok-Ho
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.3 s.345
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    • pp.68-77
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    • 2006
  • This paper presents a new Design-for-Testability (DfT) circuit for 4.5-5.5GHz low noise amplifiers (LNAs). The DfT circuit measures gain, noise figure, input impedance, input return loss, and output signal-to-noise ratio for the LNA without external expensive equipment. The DfT circuit is designed using 0.18m SiGe technology. The circuit utilizes input impedance matching and DC output voltage measurements. The technique is simple and inexpensive.

Studies on fabrication of 0.5$mu$m GaAs power MESFET's using a conventional UV lithography and angle evaporations (Conventional UV 리소그라피와 경사각증착에 의한 0.5$mu$m 전력용 CaAs MESFET 제작에 관한 연구)

  • 이일형;김상명;윤진섭;이진구
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.12
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    • pp.130-135
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    • 1995
  • GaAs power MESFET's with 0.5 .mu.m gate length using a conventional UV lithography and angle evaporations are fabricated and then DC and RF characteristics are measured and carefully analyzed. The 0.5$\mu$m GaAs power MESFET's are fabricated on epi-wafers which have an undoped GaAs layer inbetween n+ and n GaAs layers grown by MBE, and by the processes such as an image reversal(IR), air-bridge, and our developed 0.5 .mu.m gate fabrication techniques. The total gate widths of the fabricated 0.5$\mu$m GaAs power MESFETs are 0.6-3.0 mm, the current saturation of them 80-400 mA, the maximum linear and RF output power of them 60-265 mW. The current gain cut-off frequencies for the 0.5$\mu$m GaAs power MESFETs varies 13-16 GHz. For the test frequency of 10 GHz the maximum unilateral transducer power gains and the power added efficiencies of the GaAs power devices are 7.0-2.5 dB and 35.68-30.76 %, respectively.

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Design of V-Band Differential Low Noise Amplifier Using 65-nm CMOS (65-nm CMOS 공정을 이용한 V-Band 차동 저잡음 증폭기 설계)

  • Kim, Dong-Wook;Seo, Hyun-Woo;Kim, Jun-Seong;Kim, Byung-Sung
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.28 no.10
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    • pp.832-835
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    • 2017
  • In this paper, V-band differential low noise amplifier(LNA) using 65-nm CMOS process for high speed wireless data communication is presented. The LNA is composed of 3-stage common-source differential amplifiers with neutralization of feedback capacitances using MOS capacitors and impedance matching utilizing transformers. The fabricated LNA has a peak gain of 23 dB at 63 GHz and 3 dB bandwidth of 6 GHz. The chip area of LNA is $0.3mm^2$ and the LNA consumes 32 mW DC power from 1.2 V supply voltage.

OPAMP Design Using Optimized Self-Cascode Structures

  • Kim, Hyeong-Soon;Baek, Ki-Ju;Lee, Dae-Hwan;Kim, Yeong-Seuk;Na, Kee-Yeol
    • Transactions on Electrical and Electronic Materials
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    • v.15 no.3
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    • pp.149-154
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    • 2014
  • A new CMOS analog design methodology using an independently optimized self-cascode (SC) is proposed. This idea is based on the concept of the dual-workfunction-gate MOSFETs, which are equivalent to SC structures. The channel length of the source-side MOSFET is optimized, to give higher transconductance ($g_m$) and output resistance ($r_{out}$). The highest $g_m$ and $r_{out}$ of the SC structures are obtained by independently optimizing the channel length ratio of the SC MOSFETs, which is a critical design parameter. An operational amplifier (OPAMP) with the proposed design methodology using a standard digital $0.18-{\mu}m$ CMOS technology was designed and fabricated, to provide better performance. Independently $g_m$ and $r_{out}$ optimized SC MOSFETs were used in the differential input and output stages, respectively. The measured DC gain of the fabricated OPAMP with the proposed design methodology was approximately 18 dB higher, than that of the conventional OPAMP.

Vector Control for the Rotor Resistance Compensation of Induction Motor (유도전동기 회전자 저항 보상을 위한 벡터제어)

  • Park, Hyun-Chul;Lee, Su-Woon;Kim, Yeong-Min;Hwang, Jong-Sun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.11b
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    • pp.65-68
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    • 2001
  • In the vector control methods of induction motor, the stator current is divided into the flux and torque component current. By controlling these components respectively, the methods control independently flux and torque as in the DC motor and improve the control effects. To apply the vector control methods, the position of the rotor current is identified. The indirect vector control use the parameters of the machine to identify the position of rotor flux. But due to the temperature rise during machine operation, the variation of rotor resistance degrades the vector control. To solve the problem, the q-axis is aligned to reference frame without phase difference by comparing the real flux component with the reference flux component. Then to compensate the slip, PI controller is used. The proposed method keeps a constant slip by compensating the gain of direct slip frequency when the rotor resistance of induction motor varies. To prove the validations of the proposed algorithm in the paper, computer simulations is executed.

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