• Title/Summary/Keyword: Current sampling error

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A Fuzzy Controller Using Artificial Immune Algorithm for Trajectory Tracking of WMR (경로 추적을 위한 구륜 이동 로봇의 인공 면역 알고리즘을 이용한 퍼지 제어기)

  • Kim Sang-Won;Park Chong-Kug
    • Journal of Institute of Control, Robotics and Systems
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    • v.12 no.6
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    • pp.561-567
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    • 2006
  • This paper deals with a fuzzy controller using IA(Immune Algorithm) for Trajectory Tracking of 2-DOF WMR(Wheeled Mobile Robot). The global inputs to the WMR are reference position and reference velocity, which are time variables. The global output of WMR is a current position. The tracking controller makes position error to be converged 0. In order to reduce position error, a compensation velocities on the track of trajectory is necessary. Therefore, a FIAC(Fuzzy-IA controller) is proposed to give velocity compensation in this system. Input variables of fuzzy part are position errors in every sampling time. The output values of fuzzy part are compensation velocities. IA are implemented to adjust the scaling factor of fuzzy part. The computer simulation is performed to get the result of trajectory tracking and to prove efficiency of proposed controller.

An Inductance Voltage Vector Control Strategy and Stability Study Based on Proportional Resonant Regulators under the Stationary αβ Frame for PWM Converters

  • Sun, Qiang;Wei, Kexin;Gao, Chenghai;Wang, Shasha;Liang, Bin
    • Journal of Power Electronics
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    • v.16 no.3
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    • pp.1110-1121
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    • 2016
  • The mathematical model of a three phase PWM converter under the stationary αβ reference frame is deduced and constructed based on a Proportional-Resonant (PR) regulator, which can replace trigonometric function calculation, Park transformation, real-time detection of a Phase Locked Loop and feed-forward decoupling with the proposed accurate calculation of the inductance voltage vector. To avoid the parallel resonance of the LCL topology, the active damping method of the proportional capacitor-current feedback is employed. As to current vector error elimination, an optimized PR controller of the inner current loop is proposed with the zero-pole matching (ZPM) and cancellation method to configure the regulator. The impacts on system's characteristics and stability margin caused by the PR controller and control parameter variations in the inner-current loop are analyzed, and the correlations among active damping feedback coefficient, sampling and transport delay, and system robustness have been established. An equivalent model of the inner current loop is studied via the pole-zero locus along with the pole placement method and frequency response characteristics. Then, the parameter values of the control system are chosen according to their decisive roles and performance indicators. Finally, simulation and experimental results obtained while adopting the proposed method illustrated its feasibility and effectiveness, and the inner current loop achieved zero static error tracking with a good dynamic response and steady-state performance.

A Study on Bagging Neural Network for Predicting Defect Size of Steam Generator Tube in Nuclear Power Plant (원전 증기발생기 세관 결함 크기 예측을 위한 Bagging 신경회로망에 관한 연구)

  • Kim, Kyung-Jin;Jo, Nam-Hoon
    • Journal of the Korean Society for Nondestructive Testing
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    • v.30 no.4
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    • pp.302-310
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    • 2010
  • In this paper, we studied Bagging neural network for predicting defect size of steam generator(SG) tube in nuclear power plant. Bagging is a method for creating an ensemble of estimator based on bootstrap sampling. For predicting defect size of SG tube, we first generated eddy current testing signals for 4 defect patterns of SG tube with various widths and depths. Then, we constructed single neural network(SNN) and Bagging neural network(BNN) to estimate width and depth of each defect. The estimation performance of SNN and BNN were measured by means of peak error. According to our experiment result, average peak error of SNN and BNN for estimating defect depth were 0.117 and 0.089mm, respectively. Also, in the case of estimating defect width, average peak error of SNN and BNN were 0.494 and 0.306mm, respectively. This shows that the estimation performance of BNN is superior to that of SNN.

Control Strategies for Multilevel APFs Based on the Windowed-FFT and Resonant Controllers

  • Han, Yang
    • Journal of Power Electronics
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    • v.12 no.3
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    • pp.509-517
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    • 2012
  • This paper presents control strategies for cascaded H-bridge multilevel active power filters (APFs). A current loop controller is implemented using a proportional-resonant (PR) regulator, which achieves zero steady-state error at target frequencies. The power balancing mechanism for the dc-link capacitor voltages is analyzed and a voltage balancing controller is presented. To mitigate the picket-fence effect of the conventional FFT algorithm under asynchronous sampling conditions, the Hanning Windowed-FFT algorithm is proposed for reference current generation (RCG). This calculates the frequency, amplitude and phase of individual harmonic components accurately and as a result, selective harmonic compensation (SHC) is achieved. Simulation and experimental results are presented, which verify the validity and effectiveness of the devised control algorithms.

A Solution to the Inverse Kinematic by Using Neural Network (신경 회로망을 사용한 역운동학 해)

  • 안덕환;양태규;이상효
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.15 no.4
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    • pp.295-300
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    • 1990
  • Inverse kinematic problem is a crucial point for robot manipulator control. In this paper, to implement the Jacobian control technique we used the Hopfield, Tank's neural network. The states of neurons represent joint velocities, and the connection weights are determined from the current value of the Jacobian matirx. The network energy function is constructed so that its minimum corresponds to the minimum least square error. At each sampling time, connection weights and neuron states are updated according to current joint positon. Inverse kinematic solution to the planar redundant manipulator is solved by computer simulation.

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Design of Current-Type Readout Integrated Circuit for 160 × 120 Pixel Array Applications

  • Jung, Eun-Sik;Bae, Young-Seok;Sung, Man-Young
    • Journal of Electrical Engineering and Technology
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    • v.7 no.2
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    • pp.221-224
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    • 2012
  • We propose a Readout Integrated Circuit (ROIC), which applies a fixed current bias sensing method to the input stage in order to simplify the circuit structure and the infrared sensor characteristic control. For the sample-and-hold stage to display and control a signal detected by the infrared sensor using a two-dimensional (2D) focal plane array, a differential delta sampling (DDS) circuit is proposed, which effectively removes the FPN. In addition, the output characteristic is improved to have wider bandwidth and higher gain by applying a two-stage variable gain amplifier (VGA). The output characteristic of the proposed device was 23.91 mV/$^{\circ}C$, and the linearity error rate was less than 0.22%. After checking the performance of the ROIC using HSPICE simulation, the chip was manufactured and measured using the SMIC 0.35 um standard CMOS process to confirm that the simulation results from the actual design are in good agreement with the measurement results.

Analog-to-Digital Conveter Using Synchronized Clock with Digital Conversion Signal (디지털 변환신호와 동기화된 클록을 사용하는 아날로그-디지털 변환기)

  • Choi, Jin-Ho;Jang, Yun-Seok
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2017.10a
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    • pp.522-523
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    • 2017
  • Analog-to-Digital converter is designed using a current conveyor circuit and a time-to-digital converter. The analog voltage is sampled using the current conveyor circuit and then the voltage is converted to time information by the discharge of the sampling voltage. The time information is converted to digital value by the counter-type time-to-digital converter. In order to reduce the converted error the clock is synchronized with the time information pulse.

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A 10-bit 100 MSPS CMOS D/A Converter with a Self Calibration Current Bias Circuit (Self Calibration Current Bias 회로에 의한 10-bit 100 MSPS CMOS D/A 변환기의 설계)

  • 이한수;송원철;송민규
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.11
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    • pp.83-94
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    • 2003
  • In this paper. a highly linear and low glitch CMOS current mode digital-to-analog converter (DAC) by self calibration bias circuit is proposed. The architecture of the DAC is based on a current steering 6+4 segmented type and new switching scheme for the current cell matrix, which reduced non-linearity error and graded error. In order to achieve a high performance DAC . novel current cell with a low spurious deglitching circuit and a new inverse thermometer decoder are proposed. The prototype DAC was implemented in a 0.35${\mu}{\textrm}{m}$ n-well CMOS technology. Experimental result show that SFDR is 60 ㏈ when sampling frequency is 32MHz and DAC output frequency is 7.92MHz. The DAC dissipates 46 mW at a 3.3 Volt single power supply and occupies a chip area of 1350${\mu}{\textrm}{m}$ ${\times}$750${\mu}{\textrm}{m}$.

IPMSM Sensorless Control Using Square-Wave-Type Voltage Injection Method with a Simplified Signal Processing (구형파 신호 주입을 이용한 IPMSM 센서리스 제어에서 개선된 신호처리 기법)

  • Park, Nae-Chun;Kim, Sang-Hoon
    • The Transactions of the Korean Institute of Power Electronics
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    • v.18 no.3
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    • pp.225-231
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    • 2013
  • This paper presents an improved signal processing technique in the square-wave-type voltage injection method for IPMSM sensorless drives. Since the sensorless method based on the square-wave voltage injection does not use low-pass filters to get an error signal for estimating rotor position and allows the frequency of the injected voltage signal to be high, the sensorless drive system may achieve an enhanced control bandwidth and reduced acoustic noise. However, this sensorless method still requires low-pass and band-pass filters to extract the fundamental component current and the injected frequency component current from the motor current, respectively. In this paper, these filters are replaced by simple arithmetic operations so that the time delay for estimating the rotor position can be effectively reduced to only one current sampling. Hence, the proposed technique can simplify its whole signal process for the IPMSM sensorless control using the square-wave-type voltage injection. The proposed technique is verified by the experiment on the 800W IPMSM drive system.

Estimation of ESR in the DC-Link Capacitors of AC Motor Drive Systems with a Front-End Diode Rectifier

  • Nguyen, Thanh Hai;Le, Quoc Anh;Lee, Dong-Choon
    • Journal of Power Electronics
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    • v.15 no.2
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    • pp.411-418
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    • 2015
  • In this paper, a new method for the online estimation of equivalent series resistances (ESR) of the DC-link capacitors in induction machine (IM) drive systems with a front-end diode rectifier is proposed, where the ESR estimation is conducted during the regenerative operating mode of the induction machine. In the first place, a regulated AC current component is injected into the q-axis current component of the induction machine, which induces the current and voltage ripple components in the DC-link. By processing these AC signals through digital filters, the ESR can be estimated by a recursive least squares (RLS) algorithm. To acquire the AC voltage across the ESR, the DC-link voltage needs to be measured at a double sampling frequency. In addition, the ESR current is simply reconstructed from the stator currents and switching states of the inverter. Experimental results have shown that the estimation error of the ESR is about 1.2%, which is quite acceptable for condition monitoring of the capacitor.