• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.4
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• pp.528-533
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• 2016

A low voltage high PSRR CMOS Bandgap circuit capable of generating a stable voltage of less than 1 V (0.8 V and 0.5 V) robust to Process, Voltage and Temperature (PVT) variations is proposed. The high PSRR of the circuit is guaranteed by a low-voltage current mode regulator at the central aspect of the bandgap circuitry, which isolates the bandgap voltage from power supply variations and noise. The isolating current mirrors create an internal regulated voltage $V_{reg}$ for the BG core and Op-Amp rather than the VDD. These current mirrors reduce the impact of supply voltage variations. The proposed circuit is implemented in a $0.35{\mu}m$ CMOS technology. The BGR circuit occupies $0.024mm^2$ of the die area and consumes $200{\mu}W$ from a 5 V supply voltage at room temperature. Experimental results demonstrate that the PSRR of the voltage reference achieved -118 dB at frequencies up to 1 kHz and -55 dB at 1 MHz without additional circuits for the curvature compensation. A temperature coefficient of $60 ppm/^{\circ}C$ is obtained in the range of -40 to $120^{\circ}C$.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.49 no.4
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• pp.78-89
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• 2012

The generated torque of a switched reluctance(SR) motor is highly nonlinear, which makes it difficult to determine the reference current commands for minimum torque ripples. In this paper, we present a computationally simple and efficient method to minimize torque ripples of SR motors based on iterative learning control. The reference current command of each phase minimizing torque ripples is identified in 2-dimensional look-up table form. Our learning control algorithm does not require the torque model, so our method is not affected by model errors and hence is very accurate. In order to justify our work, we present some computer simulation results.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2000.11a
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• pp.212-216
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• 2000

ZnO varistors for distribution surge arrester (18kV, 5kA) were developed and tested microstructure and electrical characteristics. Microstructure of ZnO varistor was consisted of ZnO grain, spinel phase and Bi-rich phase. Average grain size of ZnO varistor was $\mu\textrm{m}$ Reference voltage and lightning impulse residual voltage of ZnO varistor exhibited a good haracteristics above 5.5kV and below 11.56kV, respectively. Consequently, discharge capacity which is the most important characteristics of ZnO varistor for surge arrester exhibited excellent properties above 70kA at twice high-current impulse test. Moreover, variation rate of reference voltage and lightning impulse residual voltage showed below 5% and 2% after high-current impulse test, respectively. Leakage current and watt loss of ZnO varistor will not increase during accelerated aging test at stress condition, such as 3.213kV/$115^{\circ}C$/1000h.

• Journal of Power Electronics
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• v.7 no.3
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• pp.265-270
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• 2007

Equal rating DC-DC converter modules can be connected in series at the input for circuits requiring higher input voltages and in parallel at the output for circuits requiring higher output currents. Since the converter modules may not be practically identical, closed loop control has to ensure that each module equally shares the total input voltage and the load current. A control scheme consisting of a common output voltage loop, individual inner current loops and individual input voltage loops have been designed in this work to achieve input voltage and load current sharing as well as load voltage regulation under supply and load disturbances. The output voltage loop provides the basic reference for the inner current loops, which are also modified by the respective input voltage loops. The average of the converter input voltages, which is dynamically varying, is chosen as the reference for input voltage loops. This choice of reference eliminates interaction among different control loops. Type II compensators and Fuzzy Logic Controllers (FLCs) are designed and compared through MATLAB based simulation and FLC is found to be satisfactory. Hence TMS320F2407A DSP based FLC is implemented and the results are presented which prove the superiority of the FLC developed for this research.

• The Transactions of the Korean Institute of Power Electronics
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• v.22 no.6
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• pp.476-483
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• 2017

In this paper, a voltage-based model predictive control (MPC) scheme for a modular multilevel converter is used to reduce switching loss. The proposed method calculates an offset voltage that clamps the switching operation of submodules in which the current greatly flows at every sampling period by using the reference phase voltage and the reference phase current. To use the offset voltage, the proposed method converts the current-based MPC to the voltage-based MPC. The proposed voltage-based MPC then generates a new reference pole voltage that clamps the switching of submodules by applying the calculated offset voltage to the phase voltage. Therefore, the proposed method can reduce the switching loss by stopping the switching operation of submodules in which the current greatly flows. The switching loss reduction effect of the proposed method is verified by comparing its loss data with those of the conventional MPC method.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.8
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• pp.1362-1368
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• 2016

This paper proposes the improved transition scheme for a sensorless drive of an interior permanent magnet synchronous motor (IPMSM). In order to operate the IPMSM, the current controller can be used until 300 rpm for the initial operation. After that, the control method of IPMSM is changed to the speed controller for the sensorless control method. At that point, the rotor speed overshoot is generated due to the rapid change of the current reference for the speed controller. The proposed algorithm is able to reduce the overshoot of a rotor speed by compensating the estimated feedforward value to the speed controller. The feedforward value of the current reference is estimated by using a coordinate transformation and is approximated to the current reference after the transition of the control mode. The effectiveness of the proposed scheme is verified by experiments using an IPMSM drive system.

• Journal of Power Electronics
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• v.17 no.2
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• pp.533-541
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• 2017

This paper presents a novel Parameter-Independent Fictive-Axis (PIFA) approach for the Voltage-Oriented Control (VOC) algorithm used in grid-tied single-phase inverters. VOC is based on the transformation of the single-phase grid current into the synchronous reference frame. As a result, an orthogonal current signal is needed. Traditionally, this signal has been obtained from fixed time delays, digital filters or a Hilbert transformation. Nevertheless, these solutions present stability and transient drawbacks. Recently, the Fictive Axis Emulation (FAE) VOC has emerged as an alternative for the generation of the quadrature current signal. FAE requires detailed information of the grid current filter along with its transfer function for signal creation. When the transfer function is not accurate, the direct and quadrature current components present steady-state oscillations as the fictive two-phase system becomes unbalanced. Moreover, the digital implementation of the transfer function imposes an additional computing burden on the VOC. The PIFA VOC presented in this paper, takes advantage of the reference current to create the required orthogonal current, which effectively eliminates the need for the filter transfer function. Moreover, the fictive signal amplitude and phase do not change with a frequency drift, which results in an increased reliability. This yields a fast, linear and stable system that can be installed without fine tuning. To demonstrate the good performance of the PIFA VOC, simulation and experimental results are presented.

• The Transactions of the Korean Institute of Power Electronics
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• v.27 no.4
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• pp.283-290
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• 2022

This study proposes a voltage control scheme in a synchronous reference frame to improve the dynamic characteristics of double-conversion UPSs. UPSs need to control positive and negative sequence voltage, so that positive and negative sequence extractors are generally used to obtain each sequence of the voltage and current. Voltage and current controllers for each sequence are implemented. However, the extractor causes considerable delay, and the delay restricts the control performance, especially for the current controller. To improve the dynamics of the current controller, the proposed scheme adopts a unified current controller without separating positive and negative sequences. By using discrete-time current controller, the control bandwidth can be extended significantly so that negative sequence current can be controlled. To enhance the performance, an additional feed-forward technique for output voltage regulation is proposed. The validity of the proposed controller is verified by experiments.

• Journal of Korea Multimedia Society
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• v.9 no.6
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• pp.750-761
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• 2006

As CBD technologies and researches have been matured, component framework as a larger reuse unit than component is being introduced. Especially issues related with adaptation and integration of components in CBD are being raised as a new research topic. The component framework is given as a solution to resolve these issues. However, current approaches don't suggest a sound and comprehensive reference model and development process applying reference model. In order to develop practical and stable component framework, reference model and concrete guidelines are essential elements. In this paper, we propose a generic reference model integrating existing reference models and a design technique of component framework based on it. Especially, we propose concrete and pragmatic guidelines such as how to design component framework architecture's view and style, how to design commonality and variability of component framework, how to design macro workflows among components, and so on. We believe that the proposed reference model becomes basis for component framework development, and the proposed design technique will support reliable and effective development of the component framework.

• Proceedings of the KIPE Conference
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• 2006.06a
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• pp.84-87
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• 2006

본 연구는 Current Mirror에 있어서 Active Current Bias에 관하여 기술하였다. Current mirror에서 Active Current Bias를 걸어주는 보편적인 방법은 Current Bias단에 저항을 연결하여 저항값을 조절함으로 해서 Current를 제어하는 방법을 사용한다. Reference 전류를 제어하는데 있어 새로이 제안하는 것은 Flyback Converter를 이용하여 Acitve Current Bias를 제어 하려 한다. 트랜지스터를 이용하여 Current Mirror Circuit를 구성하고 Current Bias 측에 Flyback Converter Circuit을 연결한다. Flyback Converter의 PWM의 Duty Ratio를 조절함으로 해서 전류를 제어하는 특징을 이용하여 Active Current Bias를 제어한다.