• Title/Summary/Keyword: Coupling Faults(CFs)

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Algorithms for Detecting Coupling Faults in Semiconductor RAM's (반도체 RAM의 결합고장을 검출하는 알고리듬)

  • 여정모;조상복
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.30A no.1
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    • pp.51-63
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    • 1993
  • "Algorithm DA" is proposed to test linked 2-CFs(2-Coupling Faults) with order 2 or 3 which are not perfectly detected in conventional algorithms. "Test 1*", "Test 2*" and "Algorithm RA" are proposed restricted 3-CFS. The time complexity of "Test 1*" is reduced in view of the detection of 3-CFS. "Test 2*" and "Algorithm RA" have not only the reduces time complexity but also the improved fault coverage in comparison with conventional algorithms. And "Algorithm RA" can be applied step by step according to the degree of the fault coverage. If "Algorithm RA" is applied to the memory with parallel test. its time complexity is reduced considerably. It is proved that the MT(March Test) with nonlinear address sequences can not detect perfectly the CFs more complex than linked 2-CFs with order 3.ss sequences can not detect perfectly the CFs more complex than linked 2-CFs with order 3.

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A New Test Algorithm for Bit-Line Sensitive Faults in High-Density Memories (고집적 메모리에서 BLSFs(Bit-Line Sensitive Faults)를 위한 새로운 테스트 알고리즘)

  • Kang, Dong-Chual;Cho, Sang-Bock
    • Journal of IKEEE
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    • v.5 no.1 s.8
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    • pp.43-51
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    • 2001
  • As the density of memories increases, unwanted interference between cells and coupling noise between bit-lines are increased. And testing high-density memories for a high degree of fault coverage can require either a relatively large number of test vectors or a significant amount of additional test circuitry. So far, conventional test algorithms have focused on faults between neighborhood cells, not neighborhood bit-lines. In this paper, a new test algorithm for neighborhood bit-line sensitive faults (NBLSFs) based on the NPSFs(Neighborhood Pattern Sensitive Faults) is proposed. And the proposed algorithm does not require any additional circuit. Instead of the conventional five-cell or nine-cell physical neighborhood layouts to test memory cells, a three-cell layout which is minimum size for NBLSFs detection is used. Furthermore, to consider faults by maximum coupling noise by neighborhood bit-lines, we added refresh operation after write operation in the test procedure(i.e.,$write{\rightarrow}\;refresh{\rightarrow}\;read$). Also, we show that the proposed algorithm can detect stuck-at faults, transition faults, coupling faults, conventional pattern sensitive faults, and neighborhood bit-line sensitive faults.

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