• 제목/요약/키워드: Copper etching

검색결과 108건 처리시간 0.026초

Electromagnetic Micro x-y Stage for Probe-Based Data Storage

  • Park, Jae-joon;Park, Hongsik;Kim, Kyu-Yong;Jeon, Jong-Up
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제1권1호
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    • pp.84-93
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    • 2001
  • An electromagnetic micro x-y stage for probe-based data storage (PDS) has been fabricated. The x-y stage consists of a silicon body inside which planar copper coils are embedded, a glass substrate bonded to the silicon body, and eight permanent magnets. The dimensions of flexures and copper coils were determined to yield $100{\;}\mu\textrm{m}$ in x and y directions under 50 mA of supplied current and to have 440 Hz of natural frequency. For the application to PDS devices, electromagnetic stage should have flat top surface for the prevention of its interference with multi-probe array, and have coils with low resistance for low power consumption. In order to satisfy these design criteria, conducting planar copper coils have been electroplated within silicon trenches which have high aspect ratio ($5{\;}\mu\textrm{m}$in width and $30{\;}\mu\textrm{m}$in depth). Silicon flexures with a height of $250{\;}\mu\textrm{m}$ were fabricated by using inductively coupled plasma reactive ion etching (ICP-RIE). The characteristics of a fabricated electromagnetic stage were measured by using laser doppler vibrometer (LDV) and dynamic signal analyzer (DSA). The DC gain was $0.16{\;}\mu\textrm{m}/mA$ and the maximum displacement was $42{\;}\mu\textrm{m}$ at a current of 180 mA. The measured natural frequency of the lowest mode was 325 Hz. Compared with the designed values, the lower natural frequency and DC gain of the fabricated device are due to the reverse-tapered ICP-RIE process and the incomplete assembly of the upper-sided permanent magnets for LDV measurements.

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초미세 금속 박판의 마이크로 채널 포밍 (Micro Channel Forming with Ultra Thin Metal Foil)

  • 주병윤;오수익;백승욱
    • 대한기계학회논문집A
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    • 제30권2호
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    • pp.157-163
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    • 2006
  • Our research dealt with micro fabrication using micro forming process. The goal of the research was to establish the limit of forming process concerning the size of forming material and formed shape. Flat-rolled ultra thin metallic foils of pure copper(3.0 and $1.0{\mu}m$ in thickness)and stainless steel($2.5{\mu}m$ in thickness) were used for forming material. We obtained the various shapes of micro channels as using designed forming process. $12-14{\mu}m$ wide and $9{\mu}m$ deep channels were made on $3.0{\mu}m$ thick foil and $6{\mu}m$ wide and $3{\mu}m$deep channels were made on $1.0{\mu}m$ thick foil. Si wafer die for forming was fabricated by using etching technique. And the relation of etching time and die dimension was investigated for fabricating precisely die groove. For the forming, die and metal foil were vacuum packed and the forming was conducted with a cold isostatic press. The formed channels were examined in terms of their dimension, surface qualities and potential for defects. Base on the examinations, formability of ultra thin metallic foil was also discussed. Finally, we compared the forming result with simulation. The result of research showed that metal forming technology is promising to produce micro parts.

Vertically Standing Graphene on Glass Substrate by PECVD

  • Ma, Yifei;Hwang, Wontae;Jang, Haegyu;Chae, Heeyeop
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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    • pp.232.2-232.2
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    • 2014
  • Since its discovery in 2004, graphene, a sp2-hybridized 2-Dimension carbon material, has drawn enormous attention. A variety of approaches have been attempted, such as epitaxial growth from silicon carbide, chemical reduction of graphene oxide and CVD. Among these approaches, the CVD process takes great attention due to its guarantee of high quality and large scale with high yield on various transition metals. After synthesis of graphene on metal substrate, the subsequent transfer process is needed to transfer graphene onto various target substrates, such as bubbling transfer, renewable epoxy transfer and wet etching transfer. However, those transfer processes are hard to control and inevitably induce defects to graphene film. Especially for wet etching transfer, the metal substrate is totally etched away, which is horrendous resources wasting, time consuming, and unsuitable for industry production. Thus, our group develops one-step process to directly grow graphene on glass substrate in plasma enhanced chemical vapor deposition (PECVD). Copper foil is used as catalyst to enhance the growth of graphene, as well as a temperature shield to provide relatively low temperature to glass substrate. The effect of growth time is reported that longer growth time will provide lower sheet resistance and higher VSG flakes. The VSG with conductivity of $800{\Omega}/sq$ and thickness of 270 nm grown on glass substrate can be obtained under 12 min growing time. The morphology is clearly showed by SEM image and Raman spectra that VSG film is composed of base layer of amorphous carbon and vertically arranged graphene flakes.

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잉크젯 인쇄기술을 이용한 인쇄회로기판의 에칭 레지스터 패터닝 (Etch resist patterning of printed circuit board by ink jet printing technology)

  • 서상훈;이로운;김용식;김태구;박성준;윤관수;박재찬;정경진;정재우
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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    • pp.108-108
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    • 2007
  • Inkjet printing is a non-contact and direct writing associated with a computer. In the industrial field, there have been many efforts to utilize the inkjet printing as a new way of manufacturing, especially for electronic devices. The etching resist used in this process is an organic polymer which becomes solidified when exposed to ultraviolet lights and has high viscosity of 300 cPs at ambient temperature. A piezoelectric-driven ink jet printhead is used to dispense $20-40\;{\mu}m$ diameter droplets onto the copper substrate to prevent subsequent etching. In this study, factors affecting the pattern formation such as printing resolution, jetting property, adhesion strength, etching and strip mechanism, UV pinning energy have been investigated. As a result, microscale Etch resist patterning of printed circuit board with tens of ${\mu}m$ high have been fabricated.

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LCD 제조공정에서 사용되는 화학물질의 종류 및 특성 (Types & Characteristics of Chemical Substances used in the LCD Panel Manufacturing Process)

  • 박승현;박해동;노지원
    • 한국산업보건학회지
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    • 제29권3호
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    • pp.310-321
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    • 2019
  • Objectives: The purpose of this study was to investigate types and characteristics of chemical substances used in LCD(Liquid crystal display) panel manufacturing process. Methods: The LCD panel manufacturing process is divided into the fabrication(fab) process and module process. The use of chemical substances by process was investigated at four fab processes and two module processes at two domestic TFT-LCD(Thin film transistor-Liquid crystal display) panel manufacturing sites. Results: LCD panels are manufactured through various unit processes such as sputtering, chemical vapor deposition(CVD), etching, and photolithography, and a range of chemicals are used in each process. Metal target materials including copper, aluminum, and indium tin oxide are used in the sputtering process, and gaseous materials such as phosphine, silane, and chlorine are used in CVD and dry etching processes. Inorganic acids such as hydrofluoric acid, nitric acid and sulfuric acid are used in wet etching process, and photoresist and developer are used in photolithography process. Chemical substances for the alignment of liquid crystal, such as polyimides, liquid crystals, and sealants are used in a liquid crystal process. Adhesives and hardeners for adhesion of driver IC and printed circuit board(PCB) to the LCD panel are used in the module process. Conclusions: LCD panels are produced through dozens of unit processes using various types of chemical substances in clean room facilities. Hazardous substances such as organic solvents, reactive gases, irritants, and toxic substances are used in the manufacturing processes, but periodic workplace monitoring applies only to certain chemical substances by law. Therefore, efforts should be made to minimize worker exposure to chemical substances used in LCD panel manufacturing process.

스퍼터링 방법으로 증착된 하층 NiFe 코어를 갖는 박막인덕터의 CMOS 집적화 공정 (Fully CMOS-compatible Process Integration of Thin film Inductor with a Sputtered Bottom NiFe Core)

  • 박일용;김상기;구진근;노태문;이대우;김종대
    • 한국전기전자재료학회논문지
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    • 제16권2호
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    • pp.138-143
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    • 2003
  • A double spiral thin-film inductor with a NiFe magnetic core is integrated with DC-DC converter IC. The NiFe core is deposited on a polyimide film as the thinckness of NiFe is 2.5~3.5 ${\mu}$m. Then, copper conductor line is deposited on the NiFe core with double spiral structure. Process integration is performed by sequential processes of etching the polyimide film deposited both top and bottom of the NiFe core and electroplation copper conductor line from exposed metal pad of the DC-DC converter IC. Process integration is simplified by elimination planarization process for top core because the proposed thin-film inductor has a bottom NiFe core only. Inductor of the fabricated monolithic DC-DC converter IC is 0.53 ${\mu}$H when the area of converter IC and thin-film inductor are 5X5$\textrm{mm}^2$ and 3.5X2.5$\textrm{mm}^2$, respectively. The efficiency is 72% when input voltage and output voltage are 3.5 V and 6 V, respectively at the operation frequency of 8 MHz.

펄스-역펄스 전착법을 이용한 SiP용 via의 구리 충진에 관한 연구 (Electroplating of Copper Using Pulse-Reverse Electroplating Method for SiP Via Filling)

  • 배진수;장근호;이재호
    • 마이크로전자및패키징학회지
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    • 제12권2호
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    • pp.129-134
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    • 2005
  • SiP의 3D패키지에 있어서 구리도금은 매우 중요한 역할을 한다 이러한 구리 도금의 조건을 알아보기 위하여 조건이 다른 전해질에서 전기화학적 I-V특성을 분석하였다. 첨가제로 억제제와 촉진제의 특성을 분석하였다. 3D 패키지에 있어서 직경 50, 75, $100{\mu}m$의 via를 사용하였다. Via의 높이는 $100{\mu}m$로 동일하였다. Via의 내부는 확산방지층으로 Ta을 전도성 씨앗층으로 Cu를 magnetron 스퍼터링 방법으로 도포하였다. 직류, 펄스, 펄스-역펄스 등 전류의 파형을 변화시키면서 구리 도금을 하였다. 직류만 사용하였을 경우에는 결함 없이 via가 채워지지 않았으며 펄스도금을 한 경우 구리 충진이 개선을 되었으나 결함이 발생하였다. 펄스-역펄스를 사용한 경우 결함 없는 구리 충진층을 얻을 수 있었다.

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Glass Ionomer Cement의 접착력(接着力)에 관(關)한 실험적(實驗的) 연구(硏究) (AN EXPERIMENTAL STUDY ON THE BONDING FORCE OF GLASS IONOMER CEMENT)

  • 이명종
    • Restorative Dentistry and Endodontics
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    • 제7권1호
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    • pp.77-83
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    • 1981
  • The purpose of this study was to observe the bonding strength between tooth surface (enamel and dentin) and restorative filling materials which are two composite resins (Clearfil and Concise) and Glass ionomer cement, after etching with 50% phoshoric acid and 37% citric acid. To measure the bonding strength in enamel, the labial surface of upper anterior tooth was cut flatly with using carborundum disk and polished with sand paper disk, and to measure in dentin, the dentin surface was prepared by grinding upper part of posterior tooth horizontally. After washing the tooth surface with water and drying with air blast, the prepared tooth surface was etched. In glass ionomer cement, 50% phosphoric acid and 37% citric acid were used, in Clearfil 40% phosphoric acid was used and in Concise, 50% phosphoric acid and 37% citric acid were used as etchant for 1 minute. After the copper band which is 5 mm in diameter and 5 mm in height was fixed on the prepared surface and each filling material was inserted into the copper band, the hooking loop was inserted into filled material in the copper band before setting to make it easily that the load is applied on the specimen. After all specimens were immersed in water at $37^{\circ}C$ for 1 week, this specimen was placed on the load cell of tensile test apparatus, and specimen was pulled at the cross-head speed of 0.8 mm per minute. The following results were obtained 1) In glass ionomer cement, the bond strength obtained by 37% citric acid was higher than one obtained by 50% phosphoric acid in enamel and dentin surfaces. The bond strength obtained in non-etched surface was much less than one by etchants in enamel and dentin surface. 2) In Clearfil, the bond strength obtained by 40% phosphoric acid was 4 times more than one obtained by non etch ant. 3) In Concise, the bond strength obtained by 50% phosphoric acid was almost same as one obtained by 37% citric acid, and the bond strength obtained by non etch ant was much less than one obtained by etchants.

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자기 조립 분자막의 표면파손특성 및 미세 금속 구조물 제작에의 응용 (Surface Damage Characteristics of Self-Assembled Monolayer and Its Application in Metal Nano-Structure Fabrication)

  • 성인하;김대은
    • 한국윤활학회:학술대회논문집
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    • 한국윤활학회 2002년도 제35회 춘계학술대회
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    • pp.40-44
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    • 2002
  • The motivation of this work is to use SAM(Self-Assembled Monolayer) for developing a rapid and flexible non-photolithographic nano-structure fabrication technique which can be utilized in micro-machining of metals as well as silicon-based materials. The fabrication technique implemented in this work consists of a two-step process, namely, mechanical scribing followed by chemical etching. From the experimental results, it was found that thiol on copper surface could be removed even under a few nN normal load. The nano-tribological characteristics of thiol-SAM on various metals were largely dependent on the native oxide layer of metals. Based on these findings, nano-patterns with sub-micrometer width and depth on metal surfaces such as Cu, Au and Ag could be obtained using a diamond-coated tip.

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구리 전해도금 박막의 미세조직에 따른 에칭 특성 (Microstructure and Etching Morphology of Copper Electrodeposits)

  • 박채민;송영석;김상혁;신한균;이효종
    • 한국표면공학회:학술대회논문집
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    • 한국표면공학회 2014년도 추계학술대회 논문집
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    • pp.132-133
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    • 2014
  • 구리도금 및 적절한 어닐링 공정을 통해 수nm 크기의 초기 도금 미세조직과 수${\mu}m$정도의 결정립 크기를 갖는 재결정이 진행된 결정립이 병존하는 도금막 샘플을 제작하였다. 전기 비저항 측정과 EBSD를 통해 결정립 성장 분율을 측정하였으며 다양한 사이즈와 결정 방향을 갖는 결정립에 대해 질산용액을 이용하여 화학적 에칭방법을 통해 간접적으로 각 구리원자의 화학적 안정성을 평가할 수 있었다. 결과적으로 결정립이 클수록 에칭속도가 느린 것을 확인하였으며, 주요 원인으로 결정립계면이 우선적으로 에칭되는 것이 관찰되었다. 즉, 결정립의 크기가 작을수록 결정립계면의 비율이 커서 에칭속도가 증가하고 Nanosize의 초기 결정립이 빨리 에칭되는 것이 확인되었다.

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