• Title/Summary/Keyword: Constant voltage output

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A Jitter Characteristic Improved PLL with RC Time Constant Circuit (저항-커패시턴스 시정수 회로를 이용하여 지터 특성을 개선한 위상고정루프)

  • An, Seong-Jin;Choi, Yong-Shig
    • Journal of the Institute of Electronics and Information Engineers
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    • v.54 no.2
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    • pp.133-138
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    • 2017
  • This paper presents a jitter characteristic improved phase locked loop (PLL) with an RC time constant circuit. In the RC time constant circuit, LPF's voltage is inputted to a comparator through small and large RC time constant circuits. The signal through a small RC time constant circuit has almost same loop filter output voltage. The signal through a large RC time constant circuit has the average value of loop filter output voltage and does as a role of reference voltage to the comparator. The output of the comparator controls the sub-charge pump which provide a current to LPF. When the loop filter output voltage increases, the sub-charge pump discharges the loop filter and decreases loop filter output voltage. When the loop filter output voltage decreases, the sub-charge pump charges the loop filter and increases loop filter output voltage. The negative feedback loop reduces the variation of loop filter output voltage resulting in jitter characteristic improvement.

Loop Filter Voltage Variation Compensated PLL with Charge Pump (전하펌프를 이용한 루프 필터 전압변화 보상 위상고정루프)

  • An, Seong-Jin;Choi, Yong-shig
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.10
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    • pp.1935-1940
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    • 2016
  • This paper proposes a phase-locked loop (PLL) to minimize the loop filter output voltage fluctuation by using a comparator including RC time constant circuits. The voltage variation of loop filter is inputted to RC time constant circuits which have two RC time constants, large and small. While a small RC time constant circuit quickly conveys the output voltage variation of loop filter, a large RC time constant circuit conveys slowly the output voltage variation of loop filter and its output looks like constant voltage. The output signal of the comparator controls the sub charge pump and reduces the input voltage variation of voltage-controlled oscillator (VCO). Therefore, the proposed PLL generates a phase noise reduced signal. It has been designed with a 1.8V supply voltage, 0.18um multi - metal and multi - poly layer CMOS process and proved by Hspice simulation.

Secondary Indirect Constant Voltage Control Technique for Hybrid Solid State Transformer using Primary Side Information (하이브리드 반도체 변압기의 1차측 정보를 이용한 2차측 간접 정전압 제어 기법)

  • Lee, Taeyeong;Yun, Chun-Gi;Cho, Younghoon
    • The Transactions of the Korean Institute of Power Electronics
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    • v.25 no.5
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    • pp.420-423
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    • 2020
  • This study proposes an indirect constant voltage control algorithm for hybrid solid-state transformers (HSSTs) by using primary side information. Considering the structure of HSSTs, measuring voltage and current information on the primary side of a transformer is necessary to control the converter and inverter of the power converter. The secondary side output voltage is measured to apply the conventional secondary side constant voltage control algorithm, and thus, the digital control board requires the same rated insulation voltage as that of the transformer. To solve this problem, the secondary voltage of the transformer obtained from the tap voltage is used. Moreover, output voltage decreases as load increases because the proposed indirect constant voltage control scheme does not consider the cable impedance between the secondary output terminal and the load. This study also proposes a technique for compensating the secondary output voltage by using the primary current of the transformer and the resistance value of the cable. An experiment is conducted using a scale-down HSST prototype consisting of a 660 V/220 V tap transformer. The problem of the proposed indirect constant voltage control strategy and the improvement effect due to the application of the compensation method are compared using the derived experimental results.

A Study on Synchronized AC Source Voltage Regulator of Voltage Fed Inverter using a Photovoltatic Effect

  • Hwang, Lak-Hoon;Lee, Chun-Sang;Kim, Jong-Lae;Jang, Byong-Gon
    • Proceedings of the KIPE Conference
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    • 1998.10a
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    • pp.547-553
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    • 1998
  • In this paper, we composed of utility interactive pv generation system of voltage source inverter, and represented uninterrutible power supply (UPS) equipment maintaining constant voltage, using a pulse width modulation(PWM) voltage fed inverter, as power source disconnection, voltage variation and output current variation with load variation. This system is driven by being synchronized voltage fed inverter and AC source, and in the steady state of power source charge battery connected to dc side with solar cell using a photovoltaic (PV) that it was so called constant voltage charge. In addition, better output waveform was generated because of PWM method, and it was proved to test by experiment maintained constant output voltage regardless of AC source disconnection, load variation, and voltage variation of AC power source.

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Output Voltage Control of Z-Source Inverter by the Detection of the Input DC Voltage and Z-Network Capacitor Voltage (입력 직류 전압과 Z-네트워크 커패시터 전압 검출에 의한 Z-소스 인버터의 출력 전압 제어)

  • Kim, Se-Jin;Jung, Young-Gook;Lim, Young-Cheol;Choi, Joon-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.60 no.8
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    • pp.1515-1522
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    • 2011
  • This paper proposes the algorithm for the output AC voltage control of Z-source inverter by the detection of the input DC voltage and Z-network capacitor voltage. The actual modulation index of the proposed method is detected by the capacitor voltage in Z-network and input DC voltage of three-phase Z-source inverter. Control modulation index for the output voltage control is calculated by the detected actual modulation index and reference modulation index. And, calculated control modulation index is applied to the modified space vector modulation (SVM) for control the output voltage of Z-source inverter. To verify the validity of the proposed method, PSIM simulation was achieved and a DSP controlled 1[kW] three-phase Z-source inverter was producted. The simulation and experiment were performed under the condition that the load was changed in case of the constant input DC voltage and the input DC voltage was changed in case of the load was constant. As a result, we could know that the output phase voltage of Z-source inverter followed to the reference voltage 70[VRMS] despite the load or the input DC voltage were suddenly changed.

Study of Constant Current-Constant Voltage Output Wireless Charging System Based on Compound Topologies

  • Tan, Linlin;Pan, Shulei;Xu, Changfu;Yan, Changxin;Liu, Han;Huang, Xueliang
    • Journal of Power Electronics
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    • v.17 no.4
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    • pp.1109-1116
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    • 2017
  • Wireless power transfer (WPT) technology has the advantages of intelligence and facilitation. This paper designs a WPT system applied to battery charging and provides a strategy which switches from the constant current (CC) charging mode to constant voltage (CV) charging mode. The LCL-LCL topology is used to realize the CC output, while the LCL-S (series compensation) topology is used to realize the CV output. The main factor affecting the output characteristics is extracted by analyzing the two topologies above. Based on the main factor, this paper puts forward a modified way to design the system. In addition, on-line monitors for the battery and switches are placed at receiving side, which avoids the need for introducing an information interaction module into the system. Therefore, the complexity of the controlling system is reduced. Finally, simulation and experimental analyses are carried out to verify the correctness of the compound topologies.

Analysis and Design for Ripple Generation Network Circuit in Constant-on-Time-Controlled Fly-Buck Converter (COT 제어 플라이벅 컨버터를 위한 전압 리플 보상회로의 분석 및 설계)

  • Cho, Younghoon;Jang, Paul
    • The Transactions of the Korean Institute of Power Electronics
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    • v.27 no.2
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    • pp.106-117
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    • 2022
  • Multiple output converters can be utilized when various output voltages are required in applications. Recently, one of the multiple output converters called fly-buck has been proposed, and has attracted attention due to the advantage that multiple output can be easily obtained with a simple structure. When constant on-time (COT) control is applied, the output ripple voltage must be treated carefully for control stability and voltage regulation characteristics in consideration of the inherent energy transfer characteristics of the fly-buck converter. This study analyzes the operation principle of the fly-buck converter with a ripple generation network and presents the design guideline for the improved output voltage regulation. Validity of the analysis and design guideline is verified using a 5 W prototype of the COT controlled fly-buck converter with a ripple generation network for telecommunication auxiliary power supply.

A Study on Synchronized AC Power Source Voltage Regulator of Voltage Fed Inverter using a Photovoltatic effect (PV효과를 이용한 전압형 인버어터 전원동기 전압 조정기에 관한 연구)

  • Hwang, Lak-Hoon
    • Journal of the Korean Institute of Telematics and Electronics S
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    • v.35S no.8
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    • pp.120-129
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    • 1998
  • In this paper represented uninterruptible power sypply(UPS) equipment maintaining constant output voltage, using a pulse width modulation(PWM) voltage fed inverter, as power source disconnection, voltage variation and output current variation with load variation. This system is driven by being synchronized voltage fed inverter and AC source, and in the steady state of power source charge battery connected to DC side with solar cell using a Photovoltaic (PV) that it was so called constant voltage charge. In addition, better output waveform was generated because of PWM(pulse width Modulation) method, and it was Proved to test by experiment maintained constant output voltage regardless of AC source disconnection, load variation, and voltage variation of AC power source.

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A low noise PLL with frequency voltage converter and loop filter voltage detector (주파수 전압 변환기와 루프 필터 전압 변환기를 이용한 저잡음 위상고정루프)

  • Choi, Hyek-Hwan
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.14 no.1
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    • pp.37-42
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    • 2021
  • This paper presents a jitter and phase noise characteristic improved phase-locked loop (PLL) with loop filter voltage detector(LFVD) and frequency voltage converter(FVC). Loop filter output voltage variation is determined through a circuit made of resistor and capacitor. The output signal of a small RC time constant circuit is almost the same as to loop filter output voltage. The output signal of a large RC time constant circuit is the average value of loop filter output voltage and becomes a reference voltage to the added LFVD. The LFVD output controls the current magnitude of sub-charge pump. When the loop filter output voltage increases, LFVD decreases the loop filter output voltage. When the loop filter output voltage decreases, LFVD increases the loop filter output voltage. In addition, FVC also improves the phase noise characteristic by reducing the loop filter output voltage variation. The proposed PLL with LFVD and FVC is designed in a 0.18um CMOS process with 1.8V power voltage. Simulation results show 0.854ps jitter and 30㎲ locking time.

Resinant DC-DC Converter with Constant Switching frequency (스위칭 주파수가 일정한 공진형 DC-DC코버어터)

  • 이윤종;김희준;안태영;박효식
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.40 no.3
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    • pp.266-274
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    • 1991
  • This paper proposed the resonant DC-DC converter with constant switching frequency. Its output is controlled by the auxiliary switch which is attached in conventional MRC circuits. The average output voltage is equal to the average voltage of the auxiliary switch. If the on time of the auxiliary switch is short, output voltage is decreased. Because of using the multi resonant method, the power loss from the parasitic elements can be decreased. Experimental performance of DF ZVS Forward MRC topology with switching frequency of 1MHz is presented.