• Title/Summary/Keyword: Connection switch

Search Result 131, Processing Time 0.033 seconds

Implementation of Q3 Adaptor ATM Connection and FR Interworking Management in ATM Switch (ATM 교환기의 Q3 Adaptor ATM 연결 및 FR 연동 관리 구현)

  • 나성욱
    • Proceedings of the Korean Information Science Society Conference
    • /
    • 2002.10e
    • /
    • pp.85-87
    • /
    • 2002
  • 본 논문은 SNMP(Simple Network Management Protocol)기반의 ATM 교환 장비를 CMIP(common management information protocol)기반의 관리망에 연동하기 위한 Q3 Adaptor 기능 중 ATM 연결 관리와 Frame Relay 연동 관리를 소개한다. 본 논문의 ATM연결 관리는 점대점(Point-to-Point Permanent Virtual Connection) PVC(P)로 한정하고, FR 연동 관리는 ATM/FR 연결의 One-to-One PVC로 한정하며 ATM 밀 ATM/FR 연결에 대하여 CMIP Manager, Q3 Adaptor 및 교환 장비의 DB간 불일치 현상을 극복하기 위한 현행화 기능도 소개한다.

  • PDF

High-Efficiency and High-Power-Density 3-Level LLC Resonant Converter (고효율 및 고전력밀도 3-레벨 LLC 공진형 컨버터)

  • Gu, Hyun-Su;Kim, Hyo-Hoon;Han, Sang-Kyoo
    • The Transactions of the Korean Institute of Power Electronics
    • /
    • v.23 no.3
    • /
    • pp.153-160
    • /
    • 2018
  • Recent trends in high-power-density applications have highlighted the importance of designing power converters with high-frequency operation. However, conventional LLC resonant converters present limitations in terms of high-frequency driving due to switching losses during the turn-off period. Switching losses are caused by the overlap of the voltage and current during this period, and can be decreased by reducing the switch voltage. In turn, the switch voltage can be reduced through a series connection of four switches, and additional circuitry is essential for balancing the voltage of each switch. In this work, a three-level LLC resonant converter that can operate at high frequency is proposed by reducing switch losses and balancing the voltages of all switches with only one capacitor. The voltage-balancing principle of the proposed circuit can be extended to n-level converters, which further reduces the switch voltage stress. As a result, the proposed circuit is applicable to high-input applications. To confirm the validity of the proposed circuit, theoretical analysis and experimental verification results from a 350 W-rated prototype are presented.

Design and Analysis of Distributed-Network-Based ATM Switch : Weaved GSN (분산망에 기반한 ATM 교환기으 설계한 성능 분석)

  • 이형일;정한유;서승우
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.25 no.1A
    • /
    • pp.56-63
    • /
    • 2000
  • In this paper, we design new high performance ATM switch architectures based on a Generalized Shuffle network(GSN). The GSN is a distributed network topology with the number of nodes in O(N). To improve the throughput of the switch, a layering strategy called Weaved GSN(WGSN). WGSN has an additional connection links between switching elements which locate in the same position of adjacent GSNs. The analysis and simulation are performed under uniform and full load conditions, and the results show that the proposed switch has better throughput and cell loss performance when compared with other banyan-based switch architectures known so far.

  • PDF

Five-Level PWM Inverter Using Series and Parallel Alternative Connection of Batteries

  • Park, Jin-Soo;Kang, Feel-soon
    • Journal of Electrical Engineering and Technology
    • /
    • v.12 no.2
    • /
    • pp.701-710
    • /
    • 2017
  • This paper presents a five-level PWM inverter using series and parallel connection of voltage sources. The alternative connection is done by an auxiliary circuit consisted of a switch, three diodes, and two batteries. The auxiliary circuit is located between input dc voltage source and H-bridge cell. Thanks to the auxiliary circuit, the proposed inverter synthesizes five-level output voltage in an effective way. Topologically both batteries are charged and discharged in the same rate, so it does not need to apply battery voltage balancing control method. Theoretical analysis of the proposed inverter is verified by computer-aided simulation and experiment based on a prototype of 1kW.

High-speed Mechanism of SNMP Connection Management in the Centralized Network Control Platform (중앙 집중화된 네트워크 제어 플랫폼에서 SNMP 연결 관리 방식의 고속화 메커니즘)

  • Ko, Young-Suk;Kwon, Tae-Hyun;Kim, Choon-Hee;Cha, Young-Wook
    • Proceedings of the IEEK Conference
    • /
    • 2007.07a
    • /
    • pp.61-62
    • /
    • 2007
  • Network control platform (NCP) and quality of service switch (QSS) are developed to realize centralized control and management technology, which is essential for guaranteeing traffic engineering and service quality in the next generation network. This paper presents high-speed connection management mechanism to enhance connection setup delay of the existing SNMP interface between NCP and QSS. We built up a connection management platform in the laboratory environment to validate the realization of the proposed mechanism.

  • PDF

The Effects of Management Traffic on the Local Call Processing Performance of ATM Switches Using Queue Network Models and Jackson's Theorem

  • Heo, Dong-Hyun;Chung, Sang-Wook;Lee, Gil-Haeng
    • ETRI Journal
    • /
    • v.25 no.1
    • /
    • pp.34-40
    • /
    • 2003
  • This paper considers a TMN-based management system for the management of public ATM switching networks using a four-level hierarchical structure consisting of one network management system, several element management systems, and several agent-ATM switch pairs. Using Jackson's queuing model, we analyze the effects of one TMN command on the performance of the component ATM switch in processing local calls. The TMN command considered is the permanent virtual call connection. We analyze four performance measures of ATM switches- utilization, mean queue length and mean waiting time for the processor directly interfacing with the subscriber lines and trunks, and the call setup delay of the ATM switch- and compare the results with those from Jackson's queuing model.

Design of Charging and Discharging Switch Structure for Rechargeable Battery Protection IC (2차 전지 보호회로를 위한 충.방전 스위치 구조의 설계)

  • 김상민;조상준;채정석;김상호;박영진;손영철;김동명;김대정
    • Proceedings of the IEEK Conference
    • /
    • 2001.06b
    • /
    • pp.85-88
    • /
    • 2001
  • This paper suggests an improved switch architecture for the rechargeable battery protection IC. In the existing protection IC, charging and discharging switches composed of the CMOS transistor and the diode are external components. It is difficult to integrate the switches in a CMOS process due to the large chip-size overhead and inevitable parasitic effects. In this paper, we propose a new switch architecture of the MOSFET's 'diode connection' method. The performance and chip-size overhead are proved to be adequate for the fully integrated protection IC.

  • PDF

Schemes to Overcome ATM VC Switch Failures using Backup Virtual Paths (예비 가상 경로를 이용한 ATM VC 교환기 고장 우회 방법)

  • Yoo, Young-Hwan;Ahn, Sang-Hyun;Kim, Chong-Sang
    • Journal of KIISE:Information Networking
    • /
    • v.27 no.2
    • /
    • pp.187-196
    • /
    • 2000
  • Failures in ATM networks can occur at virtual path (VP) links, virtual path switches, and virtual channel (VC) switches. Restoration schemes have been proposed for VP link and VP switch failures, however, none for VC switch failures. In general, VC switches are used for edge nodes in protection domains. Since even only one VC switch failure can cause a critical problem, new restoration schemes for VC switch failures are highly required. Restoration schemes at the VP level proposed so far can be categorized into those using the flooding algorithm and those using the backup virtual path (BVP) concept. Even though the latter cannot handle unpredictable failures, it has some advantages such as fast restoration and low spare capacity requirement. In this paper, we propose new restoration schemes using a new type of BVPs to handle VC switch failures. The simulation results show that the proposed schemes can restore virtual connection failures due to VC switch failures without degrading restorability for VP failures.

  • PDF

A buffer readout scheduling for ABR traffic control (ABR 트랙픽 제어를 위한 버퍼 readout 스케쥴링)

  • 구창회;이재호
    • Journal of the Korean Institute of Telematics and Electronics S
    • /
    • v.34S no.11
    • /
    • pp.25-33
    • /
    • 1997
  • The end-to-end rate-based control mechanism is used for the flow control of the ABR service to allow much more flexibility in ATM switching system. To accommodate the ABR service effciently many algorithms such as EFCI, EPRCA, ERICA, and CAPC2 have been proposed for the switch algorithm. ABR cells and related RM cells are received at the ATM switch fabric transparently without any processing. And then cells received from the traffic source are queued in the ABR buffer of switching system. The ABR buffer usually has some thresholds for easy congestion control signal transmission. Whatever we use, therefore, these can be many ABR traffic control algorithms to implement the ABR transfer capability. The genertion of congestion indicate signal for ABR control algorithms is determined by ABR buffer satus. And ABR buffer status is determined by ABR cells transfer ratio in ATM switch fabrics. In this paper, we presented the functional structures for control of the ABR traffic capability, proposed the readout scheduling, cell slot allocation of output link and the buffer allocation model for effective ABR traffic guranteeing with considering CBR/VBR traffics in ATM switch. Since the proposed readout scheduling scheme can provide more avaliable space to ABR buffer than existing readout scheduling scheme, generation rate of a SEND signal, that is, BCN signal in destination node can be increased for ABR call connection. Therefore, the proposed scheme, in this paper, can be appropriate as algorithm for effective ABR traffic service on output link of ATM switching node.

  • PDF

Design of Speed-up switch Using Sort Banyan Networks (정렬반얀 망을 이용한 성능이 향상된 스위치설계)

  • Kwon, Seung-Tag
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.28 no.4B
    • /
    • pp.282-287
    • /
    • 2003
  • A network is made up of interconnected switching units. The role of a switching unit is to set up a connection between and input port and an output, according to the routing information. But then the most switching network use Banyan switch, their occurs the internal blocking , which attempts to use the same link two cells. This paper proposed and designed for a improvement Batch-Banyan network which can routed two path assignment between its input ports and output ports without only blocking. The network is constructed of two sorting blocks ($4{\times}4$), one switch network($8{\times}8$) block. As a result, the switch network performance increased 4% reduced to half of the hardware complexity of sorting boxes when compare the new switching system with Batcher-Banyan network system.