• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.2
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• pp.307-311
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• 2015

In this paper, we propose an efficient fault-recovery technique for CGRA (Coarse-Grained Reconfigurable Architecture) based multi-core architecture. The proposed technique is intra/inter-CGRA co-reconfiguration technique based on a ring-based sharing fabric (RSF) and it enables exploiting the inherent redundancy and reconfigurability of the multi-CGRA for fault-recovery. Experimental results show that the proposed approaches achieve up to 73% fault recoverability when compared with completely connected fabric (CCF).

• Journal of the Korean Society of Systems Engineering
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• v.2 no.1
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• pp.5-10
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• 2006

This paper describes an operational concept of ships with CEC system. An operational architecture is derived using systems engineering approach. From consideration of operational environments and stakeholders, the operational concept scenarios are established and its requirements are derived. The operational requirements based operational architecture is presented using a computer aided systems engineering tool.

• Journal of the Korea Society of Computer and Information
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• v.20 no.9
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• pp.1-10
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• 2015

In this paper, we propose a new variable latency L1 data cache architecture for multi-core processors. Our proposed architecture extends the traditional variable latency cache to be geared toward the multi-core processors. We added a specialized data structure for recording the latency of the L1 data cache. Depending on the added latency to the L1 data cache, the value stored to the data structure is determined. It also tracks the remaining cycles of the L1 data cache which notifies data arrival to the reservation station in the core. As in the variable latency cache of the single-core architecture, our proposed architecture flexibly extends the cache access cycles considering process variation. The proposed cache architecture can reduce yield losses incurred by L1 cache access time failures to nearly 0%. Moreover, we quantitatively evaluate performance, power, energy consumption, power-delay product, and energy-delay product when increasing the number of cache access cycles.

• Journal of Information Technology and Architecture
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• v.10 no.1
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• pp.1-11
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• 2013

Various computing systems are used in naval ships. Since each system has a single purpose and its applications are tightly coupled with the physical machine, applications cannot share physical resources with each other. It is hard to utilize resources efficiently in conventional naval shipboard computing environment. In this paper, we present an integration architecture for virtualized naval shipboard computing systems based on open architecture. Our proposed architecture integrates individual computing resources into one single integrated hardware pool so that the OS and applications are encapsulated as a VM. We consider the issue of varying needs of all applications in a naval ship that have different purposes, priorities and requirements. We also present parallel VM migration algorithm that improves the process time of resource reallocation of given architecture. The evaluation results with the prototype system show that our algorithm performs better than conventional resource reallocation algorithm in process time.

• Proceedings of the Korea Information Processing Society Conference
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• 2020.11a
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• pp.850-853
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• 2020

gradient decent 를 기반으로 한 Differentiable architecture search(DARTS)는 한 번의 Architecture Search 로 모든 후보 연산 중 가장 가중치가 높은 연산 하나를 선택한다. 이 때 비슷한 종류의 연산이 가중치를 나누어 갖는 "표의 분산"이 나타나, 성능이 더 좋은 연산이 선택되지 못하는 상황이 발생한다. 본 연구에서는 이러한 상황을 막기위해 Architecture Parameter 가중치의 gradient 를 기반으로 연산들을 클러스터링 하여 그룹화 한다. 그 후 그룹별로 가중치를 합산하여 높은 가중치를 갖는 그룹만을 사용하여 한 번 더 Architecture Search 를 진행한다. 각각의 Architecture Search 는 DARTS 의 절반 epoch 만큼 이루어지며, 총 epoch 이 같으나 두번째의 Architecture Search 는 선별된 연산 그룹을 사용하므로 DARTS 에 비해 더 적은 Search Cost 가 요구된다. "표의 분산"문제를 해결하고, 2 번으로 나뉜 Architecture Search 에 따라 CIFAR 10 데이터 셋에 대해 2.46%의 에러와 0.16 GPU-days 의 탐색시간을 얻을 수 있다.

• Journal of the Korean Institute of Landscape Architecture
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• v.48 no.1
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• pp.15-24
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• 2020

This work examines discourse on uses of computer technology and its transformation during the last thirty years effecting Korea landscape architecture. First, in the 1990s landscape architects begun to use computers as a new technology for landscape architecture, programming computer software utilities suitable for landscape research, planning, and design. The landscape architects, acting as computer programmers, tried to explore various techniques for landscape analysis and design with a piece of software, and various experts within the field of landscape architecture collaborated with each other. However, landscape architects mainly used computer technology as a tool as a substitute for hands-on cases. Since around the 2000s, the discourse on mapping and diagrammatic techniques as a visualization technique for landscaping processes have begun. Also, realistic representations for perspective drawings using graphic software have been increasingly important. The landscape architects, acting as graphic designers, focused on the specific visualization techniques for landscape planning and design. However, computer technology has been mainly used to produce realistic visuals aids for final presentations instead of creative exploration to generate landforms. Additionally, recent landscape architects have been using landscape performance modeling and parametric modeling for landform and landscape furniture design. The landscape architects as spatial designers are actively using computer modeling as creative form-generating tools during the design process.

• Journal of the Korea Society of Computer and Information
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• v.17 no.7
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• pp.1-11
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• 2012

As process technology scales down, the number of cores integrated into a processor increases dramatically, leading to significant performance improvement. Especially, the GPU(Graphics Processing Unit) containing many cores can provide high computational performance by maximizing the parallelism. In the GPU architecture, the access latency to the main memory becomes one of the major reasons restricting the performance improvement. In this work, we analyze the performance improvement of the 3D GPU architecture compared to the 2D GPU architecture quantitatively and investigate the potential problems of the 3D GPU architecture. In general, memory instructions account for 30% of total instructions, and global/local memory instructions constitutes 60% of total memory instructions. Therefore, the performance of the 3D GPU is expected to be improved significantly compared to the 2D GPU by reducing the delay of memory instructions. However, according to our experimental results, the 3D architecture improves the GPU performance only by 2% compared to the 2D architecture due to the memory bottleneck, since the performance reduction due to memory bottleneck in the 3D GPU architecture increases by 245% compared to the 2D architecture. This paper provides the guideline for suitable memory design by analyzing the efficiency of the memory architecture in 3D GPU architecture.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.8 no.5
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• pp.54-62
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• 1999

This paper describes the design and implementation of a PC(personal computer) based open architecture machine tool controller. The hardware of open architecture CNC has generally a motion control board on a PC for controlling a servo motor. But this paper describes open architecture hardware that consists of a PC, a counter board a DAC board and a DIO board only. This makes it easy to generate CNC software module in a hardware-independent way. The proposed open architecture CNC software runs on the MS-Windows NT. The paper describes a method of con-trolling servo motors using a real-time timer of MS-Windows NT and a commercial real-time operating system on the MS-Windows. NT. An open and reconfigurable software module is made up of an object and an API(application programming interface). Using the object and the API a new CNC system can be quickly configured to control dif-ferent machine tools. The proposed open architecture CNC system is applied to 4-axis lettering center.

• Proceedings of the Korean Information Science Society Conference
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• 2012.06d
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• pp.146-148
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• 2012

본 논문에서는 최근 이슈가 되고 있는 문화 컨텐츠인 WebToon 의 단순한 표현력을 보완하고 정적인 카툰이 아닌 동적인 카툰을 제공하는 서비스에 대해 기술한다. Background, Object, Particle 3 개의 Multi Layer 를 기반으로 중력가속도, 모멘트연산을 이용한 물리엔진이 적용된 Particle system 을 사용하여 컨텐츠에 동적인 효과를 나타내준다. 컨텐츠 제작자가 PC Tool 에서 작업한 컨텐츠를 리얼툰 서비스를 통하여 관리하고, Application 을 통하여 독자에게 제공하는 서비스에 대한 Architecture 를 제안한다.

• Journal of The Korean Digital Architecture Interior Association
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• v.6 no.2
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• pp.17-23
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• 2006

The purpose of this study was to investigate how student felt the strengths and shortness of presentation methods for formation of interior spaces. For this study, the process of the interior architecture design class was divided into three stages: the programming. the design development, and the design completion. In the design development stage, students used presentation methods: hand sketch, scale model, computer modeling, and virtual realty. The strengths of hand sketch was that quick expression. Models provided three-dimensional feelings. Computer modelling provide realistic color and texture. Virtual reality provided three-dimensional immersion and real scale. It is effective that students collect brain storm images using quick hand sketch in the beginning of design development stage. After that, they compose interior spaces in study models with small scale. Watching the models, they design details of spaces by using hand sketch and computer modelling. Using virtual reality, they can check the scale and circulation. Finally, they complete computer modelling by texture mapping and check the final design in virtual reality.