• Journal of the Korea Society of Computer and Information
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• v.11 no.1 s.39
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• pp.139-145
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• 2006

Feature extraction technique in digital images has many applications such as robot vision, medical diagnostic system, and motion video transmission, etc. There are several methods for extracting features in digital images for example nonlinear gradient, nonlinear laplacian, and entropy convolutional filter. However, conventional convolutional filters are usually not efficient to extract features in an image because image feature formation in eyes is more sensitive to dark regions than to bright regions. A few nonlinear filters using difference between arithmetic mean and harmonic mean in a window for extracting sketch features are described in this paper They have some advantages, for example simple computation, dependence on local intensities and less sensitive to small intensity changes in very dark regions. Experimental results demonstrate more successful features extraction than other conventional filters over a wide variety of intensity variations.

• Journal of the Korea Society of Computer and Information
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• v.11 no.1 s.39
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• pp.45-53
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• 2006

Finite failure NHPP models presented in the literature exhibit either constant, monotonic increasing or monotonic decreasing failure occurrence rates per fault. In this paper, Goel-Okumoto and Yamada-Ohba-Osaki model was reviewed, proposes the $x^2$ reliability model, which can capture the increasing nature of the failure occurrence rate per fault. Algorithm to estimate the parameters used to maximum likelihood estimator and bisection method, model selection based on SSE, AIC statistics and Kolmogorov distance, for the sake of efficient model, was employed. Analysis of failure using real data set, SYS2(Allen P.Nikora and Michael R.Lyu), for the sake of proposing shape parameter of the $x^2$ distribution using the degree of freedom, was employed. This analysis of failure data compared with the $x^2$ model and the existing model using arithmetic and Laplace trend tests, Kolmogorov test is presented.

• Communications of the Korean Institute of Information Scientists and Engineers
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• v.1 no.1
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• pp.23-35
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• 1983

In its global meaning language translation refers to the process whereby a program which is executable in one computer can be executed in another computer directly to obtain the same result. There are four different ways of approaching translation. The first way is translation by a Translator or a Compier, the second way is Interpretation, the third way is Simulation, the last way is Emulation. This paper introduces the M-C Translator which was designed as the first way of translation. The MUSS 80 language (the subsystem of the UNIVAC Solid State 80 S-4 assembly language system) was chosen as the source language which includes forty-three instructions, using the CYBER COMPASS as the object language. The M-C translator is a two pass translator and is a two pas translator and es written in Fortran Extended language. For this M-C Translation, seven COMPASS subroutines and a set of thirty-five macros were prepared. Each executable source instruction corresponds to a macro, so it will be a macro instruction within the object profram. Subroutines are used to retain and handle the source data representation the same way in the object program as in the source system, and are used to convert the decimal source data into the equivalent binary result into the equivalent USS-80digits before and after arithmetic operations. The source instructions can be classified into three categories. First, therd are some instructions which are meaningless in the object system and are therefore unnecessary to translate, and the remaining instructions should be translated. Second, There are some instructions are required to indicate dual address portions. Third, there are Three instructions which have overflow conditions, which are lacking in the remaining instructions. The construction and functions of the M-C Translator, are explained including some of the subroutines, and macros. The problems, difficulties and the method of solving them, and easier features on this translation are analysed. The study of how to save memory and time will be continued.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.25 no.12
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• pp.1904-1913
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• 2021

With the proliferation of smart phones and the development of IoT technology, it has become possible to collect personal data for public purposes. However, users are afraid of voluntarily providing their private data due to privacy issues. To remedy this problem, mainly three techniques have been studied: data disturbance, traditional encryption, and homomorphic encryption. In this work, we perform simulations to compare them in terms of accuracy, message length, and computation delay. Experiment results show that the data disturbance method is fast and inaccurate while the traditional encryption method is accurate and slow. Similar to traditional encryption algorithms, the homomorphic encryption algorithm is relatively effective in privacy preserving because it allows computing encrypted data without decryption, but it requires high computation costs as well. However, its main cost, arithmetic operations, can be processed in parallel. Also, data analysis using the homomorphic encryption needs to do decryption only once at any number of data.

• Journal of the Korea Society of Computer and Information
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• v.14 no.1
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• pp.135-143
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• 2009

Recently, in the mobile device, the increase of the need for encoding and decoding of high-resolution images requires an efficient implementation of the image codec. This paper proposes a time-optimized color conversion method for the JPEG decoder, which reduces the number of calculations in the color conversion by the rearrangement of arithmetic operations being possible due to the linearity of the IDCT and the color conversion matrices and brings down the time complexity of the color conversion itself by the integer mapping replacing floating-point operations to the optimal fixed-point shift and addition operations, eventually reducing the time complexity of the JPEG decoder. And the proposed method compensates a decline of image quality incurred by the quantification error of the operation arrangement and the integer mapping by using the multi-mode chrominance reconstruction. The performance evaluation performed on the development platform of embedded systems showed that, compared to previous color conversion methods, the proposed method greatly reduces the image decoding time, minimizing the distortion of decoded images.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.4
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• pp.94-104
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• 2008

In this paper, we propose a new architecture of multiplier-and-accumulator (MAC) for high speed multiplication and accumulation arithmetic. By combining multiplication with accumulation and devising a hybrid type of carry save adder (CSA), the performance was improved. Since the accumulator which has the largest delay in MAC was removed and its function was included into CSA, the overall performance becomes to be elevated. The proposed CSA tree uses 1's complement-based radix-2 modified booth algorithm (MBA) and has the modified array for the sign extension in order to increase the bit density of operands. The CSA propagates the carries by the least significant bits of the partial products and generates the least significant bits in advance for decreasing the number of the input bits of the final adder. Also, the proposed MAC accumulates the intermediate results in the type of sum and carry bits not the output of the final adder for improving the performance by optimizing the efficiency of pipeline scheme. The proposed architecture was synthesized with $250{\mu}m,\;180{\mu}m,\;130{\mu}m$ and 90nm standard CMOS library after designing it. We analyzed the results such as hardware resource, delay, and pipeline which are based on the theoretical and experimental estimation. We used Sakurai's alpha power low for the delay modeling. The proposed MAC has the superior properties to the standard design in many ways and its performance is twice as much than the previous research in the similar clock frequency.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.13 no.6
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• pp.115-121
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• 2013

This paper related with the DSE-MMA (Dithered Sign-Error MMA) that is the simplification of computational arithmetic number in blind equalization algorithm in order to compensates the intersymbol interference which occurs the passing the nonlinear communication channel in the presence of the band limit and phase distortion. The SE-MMA algorithm has a merit of H/W implementation for the possible to reduction of computational arithmetic number using the 1 bit quantizer in stead of multiplication in the updating the equalizer tap weight. But it degradates the overall blind equalization algorithm performance by the information loss at the quantization process compare to the MMA. The DSE-MMA which implements the dithered signed-error concepts by using the dither signal before qualtization are added to MMA, then the improved SNR performance which represents the roburstness of equalization algorithm are obtained. It has a concurrently compensation capability of the amplitude and phase distortion due to intersymbol interference like as the SE-MMA and MMA algorithm. The paper uses the equalizer output signal, residual isi, MD, MSE learning curve and SER curve for the performance index of blind equalization algorithm, and the computer simulation were performed in order to compare the SE-MMA and DSE-MMA applying the same performance index. As a result of simulation, the DSE-MMA can improving the roburstness and the value of every performance index after steady state than the SE-MMA, and confirmed that the DSE-MMA has slow convergence speed which meaning the reaching the seady state from initial state of adaptive equalization filter.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.44 no.1
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• pp.49-55
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• 2007

To improved the multi-resolution fast hierarchical motion estimation by using de-interlacing algorithm that is effective in term of both performance and VLSI implementation, is proposed so as to cover large search area field-based as well as frame based image processing in SoC design. In this paper, we have simulated a various picture mode M=2 or M=3. As a results, the proposed algorithm achieved the motion estimation performance PSNR compare with the full search block matching algorithm, the average performance degradation reached to -0.7dB, which did not affect on the subjective quality of reconstructed images at all. And acquiring the more desirable to adopt design SoC for the fast hierarchical motion estimation, we exploit foreground and background search algorithm (FBSA) base on the dual arithmetic processor element(DAPE). It is possible to estimate the large search area motion displacement using a half of number PE in general operation methods. And the proposed architecture of MHME improve the VLSI design hardware through the proposed FBSA structure with DAPE to remove the local memory. The proposed FBSA which use bit array processing in search area can improve structure as like multiple processor array unit(MPAU).

• Journal of Korea Society of Industrial Information Systems
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• v.22 no.4
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• pp.1-9
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• 2017

In this Paper, Double Encryption Technology Based on Phase-Shifting Digital Holography and Digital Watermarking is Proposed. For the Purpose, we First Set a Logo Image to be used for Digital Watermark and Design a Binary Phase Computer Generated Hologram for this Logo Image using an Iterative Algorithm. And Random Generated Binary Phase Mask to be set as a Watermark and Key Image is Obtained through XOR Operation between Binary Phase CGH and Random Binary Phase Mask. Object Image is Phase Modulated to be a Constant Amplitude and Multiplied with Binary Phase Mask to Generate Object Wave. This Object Wave can be said to be a First Encrypted Image Having a Pattern Similar to the Noise Including the Watermark Information. Finally, we Interfere the First Encrypted Image with Reference Wave using 2-step PSDH and get a Good Visible Interference Pattern to be Called Second Encrypted Image. The Decryption Process is Proceeded with Fresnel Transform and Inverse Process of First Encryption Process After Appropriate Arithmetic Operation with Two Encrypted Images. The Proposed Encryption and Decryption Process is Confirmed through the Computer Simulations.

• Journal of Broadcast Engineering
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• v.27 no.3
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• pp.273-282
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• 2022

MPEG-VCM(Video Coding for Machine) aims to standardize video codec for machines. VCM provides data sets and anchors, which provide reference data for comparison, for several machine vision tasks including object detection, object segmentation, and object tracking. The evaluation template can be used to compare compression and machine vision task performance between anchor data and various proposed video codecs. However, performance comparison is carried out separately for each machine vision task, and information related to performance evaluation of multiple machine vision tasks on a single bitstream is not provided currently. In this paper, we propose a performance evaluation method of a video codec for AI-based multi-tasks. Based on bits per pixel (BPP), which is the measure of a single bitstream size, and mean average precision(mAP), which is the accuracy measure of each task, we define three criteria for multi-task performance evaluation such as arithmetic average, weighted average, and harmonic average, and to calculate the multi-tasks performance results based on the mAP values. In addition, as the dynamic range of mAP may very different from task to task, performance results for multi-tasks are calculated and evaluated based on the normalized mAP in order to prevent a problem that would be happened because of the dynamic range.