• 제목/요약/키워드: Circuit Resistance

검색결과 1,144건 처리시간 0.028초

FSR로 구성된 촉각 센서 패드용 Readout 회로의 설계 및 구현 (Design and Implementation of a Readout Circuit for a Tactile Sensor Pad Based on Force Sensing Resistors)

  • 윤선호;백승희;김청월
    • 센서학회지
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    • 제26권5호
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    • pp.331-337
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    • 2017
  • A readout circuit for a tactile sensor pad based on force sensing resistors was proposed, which was composed of an analog signal conditioning circuit and a digital circuit with a microcontroller. The conventional signal conditioning circuit has a dc offset voltage in the output signal, which results from the reference voltage applied to the FSR devices. The offset voltage reduces the dynamic range of the circuit and makes it difficult to operate the circuit under a low voltage power supply. In the proposed signal conditioning circuit, the dc offset voltage was removed completely. The microcontroller with A/D converter and D/A converter was used to enlarge the measurement range of pressure. For this, the microcontroller adjusts the FSR reference voltage according to the resistance magnitude of FSR under pressure. The operation of the proposed readout circuit which was connected to a tactile sensor pad with $5{\times}10$ FSR array was verified experimentally. The experimental results show the proposed readout circuit has the wider measurement range of pressure than the conventional circuit. The proposed circuit is suitable for low voltage and low power applications.

구현방식이 용이한 텍스타일 터치센서 개발 및 구조적 설계 (Development and Structural Design of Textile Touch Sensor Easily Implemented)

  • 김지선;박진희;김주용
    • 한국의류학회지
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    • 제45권1호
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    • pp.168-179
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    • 2021
  • This study presents and develops a textile type touch sensor structural design that is easy to implement. First, the design of the touch sensor circuit finds the size of the switch with the easiest finger contact and selects a structure with a long circuit with the lowest resistance value. An experiment is performed on a change in an electrostatic capacitance value that accompanies the distance on the electrode and the magnitude of the electrode area of the structure; however, the structure having the distance on the electrode and the large electrode area shows the best resistance change. The laundry assessment was conducted three times at a time and ten times at a time with an average standard deviation less than one ohm, with little change in resistance. Consequently, there were no problems with durability and performance for laundry. Finally, in the bending evaluation, the difference in resistance can be seen between 1-2 ohms and was developed as a smart wearable in the future; in addition, there was no problem as a difference in resistance can be seen between 1 and 2 ohms.

Extraction of Substrate Resistance Parameters for RF MOSFETs Based on Three-Port Measurement

  • Kang, In-Man;Shin, Hyung-Cheol
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2005년도 추계종합학술대회
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    • pp.809-812
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    • 2005
  • In this work, a new method for extracting substrate parameters of RF MOSFETs based on 3-port measurement is presented using device simulation. A T-type substrate resistance network is used. 3-port Y-parameter analyses were performed on the equivalent circuit of RF MOSFETs. All the components in the RF MOSFETs when the device is turned off were extracted directly from the 3-port device simulation data. The small-signal output admittance $Y_{22}$ can be well modeled up to 40 GHz. From the 3-port simulation and modeling results, it was verified that the proposed equivalent circuit and parameter extraction method was more accurate than the single substrate resistance model.

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소성조건에 따른 Gravure Off-set 태양전지의 전기적 특성변화 (Electric property changes of Gravure Off-set solar cells according to firing conditions)

  • 김정모;김동주;배소익
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2011년도 제42회 하계학술대회
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    • pp.1382-1383
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    • 2011
  • 결정질 실리콘 태양전지에서 전극 형성 공정은 Voc(Open-circuit voltage), Isc(Short-circuit current), Rser(Series resistance), Rshunt(Shunt resistance), FF(Fill factor) 특성에 영향을 주기 때문에 매우 중요하다. 하지만 paste와 선 공정에서의 조건에 따라 특성이 바뀌기 때문에 소성 공정을 최적화하기는 쉽지 않다. 본 연구에서는 Gravure Off-set printing 방식을 이용하여 결정질 실리콘 기판 표면에 미세 전극 형성 공정을 하고 소성 조건 최적화를 위해 peak 온도와 ramp-up 속도를 변화시켜 각 조건별 특성을 비교하였다. Peak 온도가 커질수록, contact resistance의 감소에 따라 Rser가 줄어들었다. 본 연구를 통해 Voc는 619mV, FF는 77.9%로 측정되는 Gravure Off-set 태양전지에 최적화된 소성 공정 조건을 확보하였다.

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공통컬렉터 잡음등가회로 해석에 의한 베이스저항의 추출 및 특성 (Extracting and Characterization of the Base Resistance based on Analysis of the Equivalent Noise Circuit for Common Collector)

  • 구회우;이기영
    • 대한전자공학회논문지SD
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    • 제37권2호
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    • pp.1-4
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    • 2000
  • 공통컬렉터 잡음등가회로 해석에 기초한 베이스저항 추출방법을 제시하였다. 측정은 BiCMOS공정으로 제조되고 폴리에미터 구조를 갖는 소자에 대해서 실행 되었다. 베이스저항 측정은 서로 다른 베이스전류와 구조에 따라 수행되었다. 낮은 베이스전류에서 측정된 실험값은 이론적으로 예측된 값과 매우 잘 일치하는 결과를 얻었다

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부성저항을 이용한 인덕터의 Q값 개선과 이를 이용한 발진기의 설계 및 제작 (Design and Fabrication of Oscillator Improving Q of Inductor Using Negative Resistance)

  • 권순철;윤영섭;류원열;최현철
    • 한국전자파학회:학술대회논문집
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    • 한국전자파학회 2001년도 종합학술발표회 논문집 Vol.11 No.1
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    • pp.218-221
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    • 2001
  • In this paper, High Q Inductor using negative resistance circuit and the ceramic inductor was designed and fabricated at 2GHz. It was Improved the inductor of Q=90 using a inductor with Q=30 added to negative resistance circuit at 2GHz. As a result, at the bias condition of 3V and 16mA, the output power and phase noise in the operation frequency 2.01GHz are 5dBm and -115.34dBc/Hz at 100kHz offset from carrier, respectively. Phase noise was improved -10dBc/Hz at 100kHz offset compared to only using ceremic inductor.

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은닉 마르코프 모델을 이용한 저항 점용접 품질 추정에 관한 연구 (A Study on the Quality Estimation of Resistance Spot Welding Using Hidden Markov Model)

  • 김경일;최재성
    • Journal of Welding and Joining
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    • 제20권6호
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    • pp.45-45
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    • 2002
  • This study is a middle report on the development of intelligent spot welding monitoring technology applicable to the production line. An intelligent algorithm has been developed to predict the quality of welding in real time. We examined whether it is effective or not through the In-Line and the Off-Line tests. The purpose of the present study is to provide a reliable solution which can prevent welding defects in production site. In this study, the process variables, which were monitored in the primary circuit of the welding, are used to estimate the weld quality by Hidden Markov Model(HMM). The primary dynamic resistance patterns are recognized and the quality is estimated in probability method during the welding. We expect that the algorithm proposed in the present study is feasible to the applied in the production sites for the purpose of in-process real time quality monitoring of spot welding.

은닉 마르코프 모델을 이용한 저항 점용접 품질 추정에 관한 연구 (A Study on the Quality Estimation of Resistance Spot Welding Using Hidden Markov Model)

  • 김경일;최재성
    • Journal of Welding and Joining
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    • 제20권6호
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    • pp.769-775
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    • 2002
  • This study is a middle report on the development of intelligent spot welding monitoring technology applicable to the production line. An intelligent algorithm has been developed to predict the quality of welding in real time. We examined whether it is effective or not through the In-Line and the Off-Line tests. The purpose of the present study is to provide a reliable solution which can prevent welding defects in production site. In this study, the process variables, which were monitored in the primary circuit of the welding, are used to estimate the weld quality by Hidden Markov Model(HMM). The primary dynamic resistance patterns are recognized and the quality is estimated in probability method during the welding. We expect that the algorithm proposed in the present study is feasible to the applied in the production sites for the purpose of in-process real time quality monitoring of spot welding.

A 3V-50MHz analog CMOS continuous time current-mode filter with a negative resistance load

  • 현재섭;윤광섭
    • 한국통신학회논문지
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    • 제21권7호
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    • pp.1726-1733
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    • 1996
  • A 3V-50MHz analog CMOS continuous-time current-mode filter with a negative resistance load(NRL) is proposed. In order to design a current-mode current integrator, a modified basic current mirror with a NRL to increase the output resistance is employed. the inherent circuit structure of the designed NRL current integrator, which minimizes the internal circuit nodes and enhances the gain bandwidth product, is capable of making the filter operate at the high frequency. The third order Butterworth low pass filter utilizing the designed NRL current integrator is synthesized and simulated with a 1.5.mu.m CMOS n-well proess. Simulation result shows the cutoff frequency of 50MHz and power consumption of 2.4mW/pole with a 3V power supply.

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345kV 지중 및 혼합 송전계통에서의 개폐 과전압 해석 (Analysis of Switching Overvoltage in 345kV Underground and Combined Transmission Systems)

  • 정채균;이종범;강지원
    • 대한전기학회논문지:전력기술부문A
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    • 제52권12호
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    • pp.713-721
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    • 2003
  • This paper analyzes the switching overvoltage occurred on 345kV underground power cable system as well as combined transmission system using EMTP. Cable length and closing time, preinsertion resistance have effect on switching overvoltage. Therefore, this paper analyzes the switching overvoltage occurred on conductor and sheath with change of those parameters. Specially, the cross bonding position becomes discontinuity point because of the difference between surge impedance of metal sheath and that of lead cable. Thus, the transmission and the reflection of traveling wave complexly occur at this connection point. According to these influences, voltage between sheath and earth as well as voltage between joint boxes rise. Time to crest point of switching overvoltage is longer than lightning overvoltage. Even though the voltage induced by switching surge is smaller than lightning surge, that voltage may have serious effect on the metal sheath. Therefore, this paper also analyses the reduction effect of switching overvoltage when the preinsertion resistance of circuit breaker is considered.