• 한국주조공학회지
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• 제29권1호
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• pp.38-44
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• 2009

Magnetic separation of Fe contaminated Al-Si cutting chip scraps was performed for the recyclability assessment. It was also aimed to investigate the casting and solidification characteristics of the cutting chip scraps. The magnetically separated cutting chip scraps were adequately treated for the casting procedure and test specimens were made into a stepped mold inducing different cooling rates. The test specimens were evaluated by the combined analysis of ICP, Spectroscopy, OM-image analyzer, SEM/EDS, etc. Solidification characteristics of cutting chip scraps were examined as functions of Fe content and cooling rate. It is concluded that the magnetic separation process can be utilized to recycle the Fe contaminated Al-Si cutting chip scraps in the high cooling rate foundry process.

• 대한전자공학회논문지SD
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• 제43권7호
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• pp.38-49
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• 2006

본 논문에서는 SoC를 검증 및 테스트하기 위한 새로운 개념의 칩을 제안하고 이를 SwToC(System with Test on a Chip)라 명명한다. SwToC는 SoC의 임베디드 프로세서에 재구성 가능한 로직을 추가하여 칩의 물리적인 결함을 테스트할 수 있을 뿐만 아니라 기존의 기법으로는 수행이 어려웠던 테스트 단계에서의 디자인 검증이 가능하도록 한 칩을 말한다. 제안한 개념의 칩은 고속 검증이 가능하며 테스트를 위해 많은 비용이 소모되는 ATE 가 불필요한 장점을 갖고 있다. 제안한 칩의 디자인 검증 및 테스트 기능을 평가하기 위하여 임베디드 프로세서가 내장된 상용 FPGA를 이용하여 SwToC를 구현하였으며, 구현 결과 제안한 칩의 실현 가능성을 확인하였고 적은 비용의 단말기를 통한 테스트가 가능함은 물론 기존의 검증기법에 비해 고속 검증이 가능함을 확인하였다.

• 대한임상검사과학회지
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• 제43권1호
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• pp.26-31
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• 2011

The genotypes of Human Papilloma Virus (HPV) are important in the carcinogenesis of uterine cervical cancer. Diagnosis of uterine cervical cancer screening has been executed using Papanicolau method (Pap) and HPV DNA Chip method. We researched the interrelation of HPV DNA genotypes in single and multiple infections and analyzed the results of Pap and HPV DNA Chip tests at Gunsan Medical Center (GMC). The correlation analysis was surveyed on collected results from 599 patients who have been tested with both Pap and HPV DNA chip tests from November 2004 to May 2010 at GMC. The inconsistency between Pap and HPV DNA Chip tests was 41.1%. The HPV DNA Chip genotype related with high risk cases were type 16 (13.5%), type 52 (10.5%), type 58 (10.1%), and type 18 (3.4%). Those related with low risk cases were type 70 (8.9%), type 6 (1.7%), type 40 (1.2%), type 11 (1.3%), and other types (14.3%). Among the 195 cases of HPV positive status, 161 cases were associated with single infection; 108 (67.1%) cases were related with high risk genotype; 19 (11.8%) cases were low risk genotype; 31 (21.1%) cases were related with other types. 29 cases were associated with double infections; 23 (79.3%) cases were high risks; 5 (17.2%) cases were mixed high and low risks; 1 (3.5%) case was low risk.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권1호
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• pp.85-95
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• 2015

Network-on-chip (NoC) has evolved to overcome the issues of traditional bus-based on-chip interconnect. In NoC-reuse as TAM, the test schedulers are constrained with the topological position of cores and test access points, which may negatively affect the test time. This paper presents a scalable hybrid test data transportation scheme that allows to simultaneously test multiple heterogeneous cores of NoC-based SoCs, while reusing NoC as TAM. In the proposed test scheme, single test stimuli set of multiple CUTs is embedded into each flit of the test stimuli packets and those packets are multicast to the targeted CUTs. However, the test response packets of each CUT are unicast towards the tester. To reduce network load, a flit is filled with maximum possible test response sets before unicasting towards the tester. With the aid of Verilog and analytical simulations, the proposed scheme is proved effective and the results are compared with some recent techniques.

• JSTS:Journal of Semiconductor Technology and Science
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• 제13권1호
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• pp.71-78
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• 2013

In highly reliable and durable systems, failures due to aging might result in catastrophes. Aging monitoring techniques to prevent catastrophes by predicting such a failure are required. Aging can be monitored by performing a delay test at faster clocks than functional clock in field and checking the current delay state from the test clock frequencies at which the delay test is passed or failed. In this paper, we focus on test clock control scheme for a system-on-chip (SoC) with multiple clock domains. We describe limitations of existing at-speed test clock control methods and present an on-chip faster-than-at-speed test clock control scheme for intra/inter-clock domain test. Experimental results show our simulation results and area analysis. With a simple control scheme, with low area overhead, and without any modification of scan architecture, the proposed method enables faster-than-at-speed test of SoCs with multiple clock domains.

• 한국도로학회논문집
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• 제12권3호
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• pp.79-85
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• 2010

본 논문은 골재부착력(aggregate retention) 평가를 통해서 칩실(chip seal)에서 사용되는 롤러 종류의 기초적인 연구 결과를 설명하고 있다. 입도 78M의 화강암 골재와 CRS-2 이멀젼(emulsion)을 사용하여 single layer 칩실 테스트 구간을 시공하였으며, 3개의 다른 롤러 종류를 사용하였다. 사용된 롤러 종류는 pneumatic tire roller, steel wheel roller, and combination roller를 사용하였다. 세 종류의 롤러의 성능을 효과적으로 연구하기 위해서는 시공현장으로부터 직접 테스트용 시편을 얻는 것이 매우 중요하기 때문에, 노스캐롤라이나 주, Bailey에 있는 New Sandy Hill Church Road에서 테스트 구간 설정하고 일반적인 노스캐롤라이나 주의 칩실시공 절차에 준하여 시공을 실시하였다. 테스트 구간에서 제작된 시편들을 실험실로 옮겨서 골재부착력(aggregate retention) 성능평가를 실시하였다. 골재의 부착력을 평가하기 위해서 flip-over test(FOT), Vialit test, and the third-scale Model Mobile Loading Simulator (MMLS3) 시험방법들을 채택하였다. 세 가지의 시험결과들과 시험시공 현장에서 관측된 육안조사를 통해서 다음과 같은 롤러 종류와 순서를 추천하게 되었다. pneumatic tire roller 와 combination roller를 함께 사용하며 처음에 pneumatic tire roller가 다짐을 한 뒤에 그 뒤를 combination roller가 다짐하는 순서로 다짐작업을 함으로써 칩실의 성능이 향상 되리라 사료된다.

• 대한용접접합학회:학술대회논문집
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• 대한용접접합학회 2007년 추계학술발표대회 개요집
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• pp.254-256
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• 2007

In this paper, the effects of the reflow number in the mechanical reliability of flip chip solder joint was investigated by flip chip shear test and thermal shock test. For evaluation mechanical reliability of flip chip, We experiment that specimens were operated 3-times, 6-times, 9-times, 12-times under reflow Process. After shear test and thermal shock test, We measured max shear strength and coming first crack number of thermal cycle. And We observe fracture surface and cross section by using SEM(Scanning Electron Microscope) and optical scope. In the results, the more specimens were operated reflow process, the more decreased maximum shear strength and number of thermal cycle.

• Journal of Welding and Joining
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• 제31권3호
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• pp.4-10
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• 2013

In electronic industry, the trend of future electronics will be flexible, bendable, wearable electronics. Until now, there is few study on bonding technology and reliability of bonding joint between chip with micro solder bump and flexible substrate. In this study, we investigated joint properties of Si chip with eutectic Sn-58Bi solder bump on Cu pillar bump bonded on flexible substrate finished with ENIG by flip chip process. After flip chip bonding, we observed microstructure of bump joint by SEM and then evaluated properties of bump joint by die shear test, thermal shock test, and bending test. After thermal shock test, we observed that crack initiated between $Cu_6Sn_5IMC$ and Sn-Bi solder and then propagated within Sn-Bi solder and/or interface between IMC and solder. On the other hands, We observed that fracture propated at interface between Ni3Sn4 IMC and solder and/or in solder matrix after bending test.

• 제어로봇시스템학회논문지
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• 제5권7호
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• pp.848-854
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• 1999

In this paper, we designed and implemented a precise pulse motor controller chip that generates the pulse needed to control step motor, DC servo and AC servo motors. This chip generates maximum pulse output rate of 5Mpps and has the quasi-S driving capability and speed and moving distance override capability during driving. We designed this chip with VHDL and executed a logic simulation and synthesis using Synopsys tool. The pre-layout simulation and post-layout simulation was executed by Compass tool. This chip was produced with 100 pins, PQFP package by 0.8${\mu}{\textrm}{m}$ gate array process and implemented by completely digital logic. We developed the test hardware board of performance and the CAMC(Computer Aided Motor Controller) Agent softwate to test the performance of the pulse motor controller chip produced. CAMC Agent enables user to set parameters needed to control motor with easy GUI(Graphic User Interface) environment and to display the output response of motor graphically.

• 대한기계학회논문집
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• 제11권6호
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• pp.1005-1013
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• 1987

For the factory automation and unmanned machine operation, it is very important to manufacture highly reliable and efficient chip breakers for optimal chip control. In this research, using the CALMA CAD/CAM SYSTEM, the manufacturing process of 3-dimensional chip breakers is established. Using the results of the cutting test of the selected chip breakers with double-step grooves, the chip breaking mechanism is schematically analysed. An expression for the chip breaking relation is derived which considers chip material behavior following LUDWIK's stress-strain curve, chip breaking criterion and the shape of chip breakers. This contains the thickness of chip, the radius of chip curl, and the mechanical properties of chip materials. It is found that the expression agrees very closely with the experimental results.