• 제목/요약/키워드: Ceramic thick film

검색결과 206건 처리시간 0.025초

MgO 및 $TiO_2$가 첨가된 $ZnCr_2O_4$ 세라믹 후막 습도센서의 감습 특성 (Humidity-Sensitive Characteristics of MgO and $TiO_2$ Addition on $ZnCr_2O_4$ Ceramic Thick-Film Humidity Sensors)

  • 윤상옥;김관수;조태현;심상홍
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.2
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    • pp.898-901
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    • 2004
  • [ $ZnCr_2O_4$ ]를 모물질로 하고 MgO, $TiO_2$를 몰비로 2:1, 4:1, 6:1, 및 8:1이 되게 정량적으로 조합한 후, 조사하였다. $ZnCr_2O_4$-MgO와 $ZnCr_2O_4-TiO_2$를 X-선 분석한 결과 Spinel 결정구조를 형성하였으며, 또한 SEM과 EDX 분석결과 각각 $Li_2CrO_4$$Li_3VO_4$의 형성으로 인하여 저항 특성이 나타나는 것을 알 수 있었다. $ZnCr_2O_4-MgO$, $ZnCr_2O_4-TiO_2$에서 MgO의 양이 증가할수록 저항값은 약간 감소하는 반면, $TiO_2$의 양이 증가할수록 저항값이 급격히 증가하는 특성을 나타내었고, 감습 특성에서도 M??보다 TiO2가 더 높게 나타내었다. 습에 따른 복원 특성의 경우 $700^{\circ}C$에서 소결한 ($ZnCr_2O_4:MgO=4:1$)과 ($ZnCr_2O_4:TiO_2=6:1$) 조성의 센서가 가장 양호하였다.

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적층 PTC 써미스터의 전기적 특성에 대한 재산화의 영향 (Effect of Re-oxidation on the Electrical Properties of Mutilayered PTC Thermistors)

  • 전명표
    • 한국전기전자재료학회논문지
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    • 제26권2호
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    • pp.98-103
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    • 2013
  • The alumina substrates that Ni electrode was printed on and the multi-layered PTCR thermistors of which composition is $(Ba_{0.998}Ce_{0.002})TiO_3+0.001MnCO_3+0.05BN$ were fabricated by a thick film process, and the effect of re-oxidation temperature on their resistivities and resistance jumps were investigated, respectively. Ni electroded alumina substrate and the multi-layered PTC thermistor were sintered at $1150^{\circ}C$ for 2 h under $PO_2=10^{-6}$ Pa and then re-oxidized at $600{\sim}850^{\circ}C$ for 20 min. With increasing the re-oxidation temperature, the room temperature resistivity increased and the resistance jump ($LogR_{290}/R_{25}$) decreased, which seems to be related to the oxidation of Ni electrode. The small sized chip PTC thermistor such as 2012 and 3216 exhibits a nonlinear and rectifying behavior in I-V curve but the large sized chip PTC thermistor such as 4532 and 6532 shows a linear and ohmic behavior. Also, the small sized chip PTC thermistor such as 2012 and 3216 is more dependent on the re-oxidation temperature and easy to be oxidized in comparison with the large sized chip PTC thermistor such as 4532 and 6532. So, the re-oxidation conditions of chip PTC thermistor may be determined by considering the chip size.

Fabrication of PZT Film by a Single-Step Spin Coating Process

  • Oh, Seung-Min;Kang, Min-Gyu;Do, Young-Ho;Kang, Chong-Yun;Nahm, Sahn;Yoon, Seok-Jin
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2011년도 제40회 동계학술대회 초록집
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    • pp.193-193
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    • 2011
  • To obtain ceramic films, the sol-gel coating technique has been broadly used with heat treatment, but crack formation tend to occur during heat treatment in thick sol-gel films. We prepared PZT thin films by sol-gel method with single-step spin coating process. The PZT solution have been synthesized using lead acetate ($Pb(CH_3COO)_2$), zirconium acetylacetonate ($Zr(OC_3H_7^n)_4$), and titanium diisopropoxide bis(acetylacetonate) 75wt% in isopropanol ($Ti(OC_3H_7^i)_2(OC_3H_7^n)_2$) as starting materials and n-propanol was selected as a solvent. The poly(vynilpyrrolidone) (PVP) was added with 0, 0.25, 0.5, 0.75, and 1 molar ratios to control viscosity of solution. We investigated influence of the viscosity on thickness, microstructure, and electrical properties of final PZT films. Thermo-gravimetric analysis and differential scanning calorimeter (TGA/DSC) was carried out from room temperature to $800^{\circ}C$ in order to measure pyrolysis temperature. Structural characteristics were analyzed by X-ray diffraction (XRD) and scanning electron microscopy (SEM). Ferroelectric and dielectric properties were measured by RT66A (Radiant) and impedance analyzer (Agilent), respectively. The thicknesses of PZT films depended on incorporation of an excess amount of PVP. Finally, we obtained PZT films of good quality without crack formation via single-step spin coating.

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유전재료와 후면전극에 따른 저전력 소비형 AC Powder EL 소자 제조 및 광전기적 특성 (Preparation and Optoelectric Characteristics of Low Power Consumption Type AC Powder EL Devices with Dielectrics and Rear Contact)

  • 이강렬;박성
    • 한국세라믹학회지
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    • 제39권2호
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    • pp.120-125
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    • 2002
  • AC powder EL 소자를 절연층의 유전재료와 후면전극의 전기비저항을 변화시켜 스크린 프린팅법으로 제조하였다. 제조된 소자의 광전기적 특성을 평가하기 위하여 인가 전압은 50∼300 $V_{rms}$까지 변화시켜 휘도 및 전류밀도를 측정하였다. 주파수 및 전압공급원은 정현파 발생 장치로서 frequency generator를 이용하였다. 휘도는 luminometer 의해 측정되었으며 전류밀도 측정을 위하여 multimeter를 사용하였다. 또한 유전층에 대한 유전율을 후막 제조 후 impedance analyser(HP 4194 A)를 이용하여 측정하였다. $TiO_2$ 분말을 $BaTiO_3$에 첨가함에 따라 유전율의 향상으로 초저가형 AC powder EL 소자의 유전층에 적용함으로써 거의 비슷한 전류밀도 하에 50 cd/$m^2$ 정도의 향상된 휘도를 얻을 수 있었다. 저전력 소모형 AC powder EL 소자의 유전층에 적용시 상용분말을 이용한 경우보다 용액 연소법에 의해 제조된 $BaTiO_3$ 분말을 이용한 경우가 더욱 향상된 85 cd/$m^2$ 정도의 휘도를 얻을 수 있었다. 또한 후면전극의 전기 비저항을 조절함으로써 AC powder EL 소자의 휘도는 비교적 감소하지만 전류밀도를 낮출 수 있었다.

희석기체가 화학증착 탄화규소의 성장거동에 미치는 영향 (The Effect of Diluent Gases on the Growth Behavior of CVD SiC)

  • 최두진;김한수
    • 한국세라믹학회지
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    • 제34권2호
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    • pp.131-138
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    • 1997
  • 희석기체로써 Ar 및 H2를 사용하여 MTS(CH3SiCl3)를 원료물질로 한 탄화규소막을 흑연 기판 위에 화학증착시켰다. 본 연구는 증착온도 130$0^{\circ}C$, 총압력은 10 torr 및 MTS와 원료 운반기체의 총유량은 100 sccm으로 일정하게한 상태에서, 각 희석기체의 첨가에 따른 성장거동의 변화를 고찰하고자 하였다. 증착속도는 희석기체와 상관없이 첨가량이 200sccm일 때 최대값을 갖는 모양을 보였으나, Ar을 첨가할 때가 H2에 비해 더 빠른 증착속도를 나타냈다. 이러한 증착속도 특성은 전체 증착속도가 물질전달 율속단계에 있을 때, 각 희석기체의 첨가에 따라 변화되는 경막 두께(boundary layer thickness) 및 원료물질 농도의 상관관계에 기인한다고 여겨졌다. 우선배향성은 Ar의 경우 모든 첨가량의 범위에서 (220)면으로 우선배향되었으나, H2의 경우에는 200sccm이상에서 첨가량에 비례하여 (111)면으로 우선배향되는 경향을 보였다. 표면미세구조는 Ar을 첨가한 경우에 일정하게 facet구조를 유지하였으나, H2의 경우에는 facet에서 평탄한(smooth)구조로 변화되었다. 표면조도의 경우 첨가량이 늘어남에 따라 지속적으로 Ar에서는 증가하였지만, H2에서는 감소하였다.

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A bilayer diffusion barrier of atomic layer deposited (ALD)-Ru/ALD-TaCN for direct plating of Cu

  • Kim, Soo-Hyun;Yim, Sung-Soo;Lee, Do-Joong;Kim, Ki-Su;Kim, Hyun-Mi;Kim, Ki-Bum;Sohn, Hyun-Chul
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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    • pp.239-240
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    • 2008
  • As semiconductor devices are scaled down for better performance and more functionality, the Cu-based interconnects suffer from the increase of the resistivity of the Cu wires. The resistivity increase, which is attributed to the electron scattering from grain boundaries and interfaces, needs to be addressed in order to further scale down semiconductor devices [1]. The increase in the resistivity of the interconnect can be alleviated by increasing the grain size of electroplating (EP)-Cu or by modifying the Cu surface [1]. Another possible solution is to maximize the portion of the EP-Cu volume in the vias or damascene structures with the conformal diffusion barrier and seed layer by optimizing their deposition processes during Cu interconnect fabrication, which are currently ionized physical vapor deposition (IPVD)-based Ta/TaN bilayer and IPVD-Cu, respectively. The use of in-situ etching, during IPVD of the barrier or the seed layer, has been effective in enlarging the trench volume where the Cu is filled, resulting in improved reliability and performance of the Cu-based interconnect. However, the application of IPVD technology is expected to be limited eventually because of poor sidewall step coverage and the narrow top part of the damascene structures. Recently, Ru has been suggested as a diffusion barrier that is compatible with the direct plating of Cu [2-3]. A single-layer diffusion barrier for the direct plating of Cu is desirable to optimize the resistance of the Cu interconnects because it eliminates the Cu-seed layer. However, previous studies have shown that the Ru by itself is not a suitable diffusion barrier for Cu metallization [4-6]. Thus, the diffusion barrier performance of the Ru film should be improved in order for it to be successfully incorporated as a seed layer/barrier layer for the direct plating of Cu. The improvement of its barrier performance, by modifying the Ru microstructure from columnar to amorphous (by incorporating the N into Ru during PVD), has been previously reported [7]. Another approach for improving the barrier performance of the Ru film is to use Ru as a just seed layer and combine it with superior materials to function as a diffusion barrier against the Cu. A RulTaN bilayer prepared by PVD has recently been suggested as a seed layer/diffusion barrier for Cu. This bilayer was stable between the Cu and Si after annealing at $700^{\circ}C$ for I min [8]. Although these reports dealt with the possible applications of Ru for Cu metallization, cases where the Ru film was prepared by atomic layer deposition (ALD) have not been identified. These are important because of ALD's excellent conformality. In this study, a bilayer diffusion barrier of Ru/TaCN prepared by ALD was investigated. As the addition of the third element into the transition metal nitride disrupts the crystal lattice and leads to the formation of a stable ternary amorphous material, as indicated by Nicolet [9], ALD-TaCN is expected to improve the diffusion barrier performance of the ALD-Ru against Cu. Ru was deposited by a sequential supply of bis(ethylcyclopentadienyl)ruthenium [Ru$(EtCp)_2$] and $NH_3$plasma and TaCN by a sequential supply of $(NEt_2)_3Ta=Nbu^t$ (tert-butylimido-trisdiethylamido-tantalum, TBTDET) and $H_2$ plasma. Sheet resistance measurements, X-ray diffractometry (XRD), and Auger electron spectroscopy (AES) analysis showed that the bilayer diffusion barriers of ALD-Ru (12 nm)/ALD-TaCN (2 nm) and ALD-Ru (4nm)/ALD-TaCN (2 nm) prevented the Cu diffusion up to annealing temperatures of 600 and $550^{\circ}C$ for 30 min, respectively. This is found to be due to the excellent diffusion barrier performance of the ALD-TaCN film against the Cu, due to it having an amorphous structure. A 5-nm-thick ALD-TaCN film was even stable up to annealing at $650^{\circ}C$ between Cu and Si. Transmission electron microscopy (TEM) investigation combined with energy dispersive spectroscopy (EDS) analysis revealed that the ALD-Ru/ALD-TaCN diffusion barrier failed by the Cu diffusion through the bilayer into the Si substrate. This is due to the ALD-TaCN interlayer preventing the interfacial reaction between the Ru and Si.

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