• Journal of electromagnetic engineering and science
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• 제2권2호
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• pp.68-74
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• 2002

In this paper, a pre-layout design approach for high-speed microprocessor is proposed. For multilayer PCB stark up configuration as well as selection and placement of decoupling capacitors, an effective solution for reducing SSN and EMI is obtained by modeling and simulation of complete power distribution system. The system model includes VRM, decoupling capacitors, multiple power and ground planes for core voltage, vias, as well as microprocessor. Finally, the simulation results are verified by measurements data.

• 조명전기설비학회논문지
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• 제13권3호
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• pp.48-55
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• 1999

본 연구에서는 방사상 배전계통에 있어서 손실감소 및 전압보상을 위한 커패시터 최적배치 및 운용 방안을 제시하였다. 커패시터 배치와 관련된 비용함수를 실제 뱅크단위로 이산성을 고려하여 계단함수로 정식화하였다. 불연속이면서 미분 불가능한 함수인 커패시터 배치와 관련된 비용함수의 해를 효율적으로 구하기 위하여 전역적탐색기법인 GA를 이요하였다. 특히, GA의 스트링을 커패시터가 배치될 모선의 인덱스와 투입량인 뱅크단위로 동시에 구성하여 기존의 방법보다 효율적으로 해를 탐색하였다. 또한 스트링의 길이를 변화시킬 수 있는 길이 돌연변이(length mutation) 연산자를 사용하므로써 효과적으로 커패시터 설치위치의 수를 결정할 수 있었다. 제안한 커패시터 설치위치와 투입량을 동싱에 탐색할 수 있는 방안으로부터 커패시터의 최소 투입량으로 다양한 부하레벨에서 전력손실을 감소시키고, 전압강하를 적절히 보강시킬수 있다. 이에 대한 효용성을 입증하기 위하여 22kV-9-section feeler로 구성된 방사상 배전계통에 적용하였다.

• Journal of Power Electronics
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• 제19권5호
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• pp.1235-1247
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• 2019

Zero-Voltage-Switching (ZVS) operation for a Wireless Power Transfer (WPT) system can be achieved by designing a ZVS controller. However, the performance of the controller in some industrial applications needs to be designed tightly. This paper introduces a ZVS controller design method for WPT systems. The parameters of the controller are designed according to the desired performance based on the closed loop dominant pole placement method. To describe the dynamic characteristics of the system ZVS angle, a nonlinear dynamic model is deduced and linearized using the small signal linearization method. By analyzing the zero-pole distribution, a low-order equivalent model that facilitates the controller design is obtained. The parameters of the controller are designed by calculating the time constant of the closed-loop dominant poles. A prototype of a WPT system with the designed controller and a five-stage multistage series variable capacitor (MSVC) is built and tested to verify the performance of the controller. The recorded response curves and waveforms show that the designed controller can maintain the ZVS angle at the reference angle with satisfactory control performance.

• 한국정보기술학회 영문논문지
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• 제10권1호
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• pp.37-43
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• 2020

This paper presents analysis of passive metal interconnection of the LNA block in CMOS integrated circuit. The performance of circuit is affected by the geometry of RF signal path. To investigate the effect of interconnection lines, a cascode LNA is designed, and circuit simulations with full-wave electromagnetic (EM) simulations are executed for different positions of a component. As the results, the position of an external capacitor (C_ex) changes the parasitic capacitance of electric coupling; the placement of component affects the circuit performance. This analysis of interconnection line is helpful to analyze the amount of electromagnetic coupling between the lines, and useful to choose the signal path in the layout design. The target of this work is the RF LNA enabling the seamless connection of wireless data network and the following standards have to be supported in multi-band (WCDMA: 2.11~ 2.17 GHz, CDMA200 1x : 1.84~1.87 GHz, WiBro : 2.3~2.4GHz) mobile application. This work has been simulated and verified by Cadence spectre RF tool and Ansoft HFSS. And also, this work has been implemented in a 0.13um RF CMOS technology process.

• Journal of Power Electronics
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• 제16권3호
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• pp.1110-1121
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• 2016

The mathematical model of a three phase PWM converter under the stationary αβ reference frame is deduced and constructed based on a Proportional-Resonant (PR) regulator, which can replace trigonometric function calculation, Park transformation, real-time detection of a Phase Locked Loop and feed-forward decoupling with the proposed accurate calculation of the inductance voltage vector. To avoid the parallel resonance of the LCL topology, the active damping method of the proportional capacitor-current feedback is employed. As to current vector error elimination, an optimized PR controller of the inner current loop is proposed with the zero-pole matching (ZPM) and cancellation method to configure the regulator. The impacts on system's characteristics and stability margin caused by the PR controller and control parameter variations in the inner-current loop are analyzed, and the correlations among active damping feedback coefficient, sampling and transport delay, and system robustness have been established. An equivalent model of the inner current loop is studied via the pole-zero locus along with the pole placement method and frequency response characteristics. Then, the parameter values of the control system are chosen according to their decisive roles and performance indicators. Finally, simulation and experimental results obtained while adopting the proposed method illustrated its feasibility and effectiveness, and the inner current loop achieved zero static error tracking with a good dynamic response and steady-state performance.