• 제목/요약/키워드: CTE mismatch

검색결과 43건 처리시간 0.027초

Direct Fabrication of a-Si:H Thin Film Transistor Arrays on Flexible Substrates: Critical Challenges and Enabling Solutions

  • O'Rourke, Shawn M.;Loy, Douglas E.;Moyer, Curt;Bawolek, Edward J.;Ageno, Scott K.;O'Brien, Barry P.;Marrs, Michael;Bottesch, Dirk;Dailey, Jeff;Naujokaitis, Rob;Kaminski, Jann P.;Allee, David R.;Venugopal, Sameer M.;Haq, Jesmin;Colaneri, Nicholas;Raupp, Gregory B.
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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    • pp.1459-1462
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    • 2008
  • In this paper we describe solutions to address critical challenges in direct fabrication of amorphous silicon thin film transistor (TFTs) arrays for active matrix flexible displays. For all flexible substrates a manufacturable handling protocol in automated display-scale equipment is required. For metal foil substrates the principal challenges are planarization and electrical isolation, and management of stress (CTE mismatch) during TFT fabrication. For plastic substrates the principal challenge is dimensional instability management.

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플립칩 패키지에서 무연 솔더 조인트 및 UBM의 열충격 특성 해석 (An Analysis on the Thermal Shock Characteristics of Pb-free Solder Joints and UBM in Flip Chip Packages)

  • 신기훈;김형태;장동영
    • 한국공작기계학회논문집
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    • 제16권5호
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    • pp.134-139
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    • 2007
  • This paper presents a computer-based analysis on the thermal shock characteristics of Pb-free solder joints and UBM in flip chip assemblies. Among four types of popular UBM systems, TiW/Cu system with 95.5Sn-3.9Ag-0.6Cu solder joints was chosen for simulation. A simple 3D finite element model was first created only including silicon die, mixture between underfill and solder joints, and substrate. The displacements due to CTE mismatch between silicon die and substrate was then obtained through FE analysis. Finally, the obtained displacements were applied as mechanical loads to the whole 2D FE model and the characteristics of flip chip assemblies were analyzed. In addition, based on the hyperbolic sine law, the accumulated creep strain of Pb-free solder joints was calculated to predict the fatigue life of flip chip assemblies under thermal shock environments. The proposed method for fatigue life prediction will be evaluated through the cross check of the test results in the future work.

자동차 엔진룸용 전장품 유무연 솔더 접합부의 열화특성 (Degradation Characteristics of Eutectic and Pb-free Solder Joint of Electronics mounted for Automotive Engine)

  • 김아영;홍원식
    • Journal of Welding and Joining
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    • 제32권3호
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    • pp.74-80
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    • 2014
  • Due to environmental regulations (RoHS, WEEE and ELV) of the European Union, electronics and automotive electronics have to eliminate toxic substance from their devices and system. Especially, reliability issue of lead-free solder joint is increasing in car electronics due to ELV (End-of-Life Vehicle) banning from 2016. We have prepared engine control unit (ECU) modules soldered with Sn-40Pb and Sn-3.0Ag-0.5Cu (SAC305) solders, respectively. Degradation characteristics of solder joint strength were compared with various conditions of automobile environment such as cabin and engine room. Thermal cycle test (TC, $-40^{\circ}C$ ~ ($85^{\circ}C$ and $125^{\circ}C$), 1500 cycles) were conducted with automotive company standard. To compare shear strength degradation rate with eutectic and Pb-free solder alloy, we measured shear strength of chip components and its size from cabin and engine ECU modules. Based on the TC test results, finally, we have known the difference of degradation level with solder alloys and use environmental conditions. Solder joints degradation rate of engine room ECU is superior to cabin ECU due to large CTE (coefficient of thermal expansion) mismatch in field condition. Degradation rate of engine room ECU is 50~60% larger than cabin room electronics.

모바일 폰 카메라 패키지의 다이 본딩 에폭시가 Warpage와 광학성능에 미치는 영향 분석 (Effect of Die Bonding Epoxy on the Warpage and Optical Performance of Mobile Phone Camera Packages)

  • 손석우;김학용;양호순
    • 반도체디스플레이기술학회지
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    • 제15권4호
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    • pp.1-9
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    • 2016
  • The warpage on mobile phone camera packages occurs due to the CTE(Coefficient of Thermal Expansion) mismatch between a thin silicon die and a substrate. The warpage in the optical instruments such as camera module has an effect on the field curvature, which is one of the factors degrading the optical performance and the product yield. In this paper, we studied the effect of die bonding epoxy on the package and optical performance of mobile phone camera packages. We calculated the warpages of camera module packages by using a finite element analysis, and their shapes were in good agreement showing parabolic curvature. We also measured the warpages and through-focus MTF of camera module specimens with experiments. The warpage was improved on an epoxy with low elastic modulus at both finite element analysis and experiment results, and the MTF performance increased accordingly. The results show that die bonding epoxy affects the warpage generated on the image sensor during the packaging process, and this warpage eventually affects the optical performance associated with the field curvature.

PTH Crack을 고려한 저항 변화 추정 모델 (A Study on Estimation Model of Resistance Value from Change of PTH Crack Size)

  • 김기영;박부희;김선진;유기훈;설동진;장중순;이형록;김태혁
    • 한국신뢰성학회지:신뢰성응용연구
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    • 제8권4호
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    • pp.155-166
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    • 2008
  • PTH cracks are caused by the mismatch of coefficient of thermal expansion(CTE) between polymer and laminated materials, and are one of the main failure mechanisms of multi layer boards. In spite of its importance, it is usually hard to measure or detect them because of its small size and invisibility. To detect PTH cracks more effectively, this paper proposes a theoretical model that can estimate the resistance value from crack size of PTHs. Using four-point probe resistance measurement method, the resistance value of test coupons is measured. Through measured data, we verify the validity of the proposed theoretical model and set up criteria of failure.

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$\mu$BGA 장기신뢰성에 미치는 언더필영향 (Effect of Underfill on $\mu$BGA Reliability)

  • 고영욱;신영의;김종민
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 2002년도 춘계 기술심포지움 논문집
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    • pp.138-141
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    • 2002
  • There are continuous efforts in the electronics industry to a reduced electronic package size. Reducing the size of electronic packages can be achieved by a variety of means, and for ball grid array(BGA) packages an effective method is to decrease the pitch between the individual balls. Chip scale package(CSP) and BGA are now one of the major package types. However, a reduced package size has the negative effect of reducing board-level reliability. The reliability concern is for the different thermal expansion rates of the two-substrate materials and how that coefficient CTE mismatch creates added stress to the BGA solder joint when thermal cycled. The point of thermal fatigue in a solder joint is an important factor of BGA packages and knowing at how many thermal cycles can be ran before failure in the solder BGA joint is a must for designing a reliable BGA package. Reliability of the package was one of main issues and underfill was required to improve board-level reliability. By filling between die and substrate, the underfill could enhance the reliability of the device. The effect of underfill on various thermomechanical reliability issues in $\mu$BGA packages is studied in this paper.

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EFFECTS OF PROCESS INDUCED DEFECTS ON THERMAL PERFORMANCE OF FLIP CHIP PACKAGE

  • Park, Joohyuk;Sham, Man-Lung
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 2002년도 추계기술심포지움논문집
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    • pp.39-47
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    • 2002
  • Heat is always the root of stress acting upon the electronic package, regardless of the heat due to the device itself during operation or working under the adverse environment. Due to the significant mismatch in coefficient of thermal expansion (CTE) and the thermal conductivity (K) of the packaging components, on one hand intensive research has been conducted in order to enhance the device reliability by minimizing the mechanical stressing and deformation within the package. On the other hand the effectiveness of different thermal enhancements are pursued to dissipate the heat to avoid the overheating of the device. However, the interactions between the thermal-mechanical loading has not yet been address fully. in articular when the temperature gradient is considered within the package. To address the interactions between the thermal loading upon the mechanical stressing condition. coupled-field analysis is performed to account the interaction between the thermal and mechanical stress distribution. Furthermore, process induced defects are also incorporated into the analysis to determine the effects on thermal conducting path as well as the mechanical stress distribution. It is concluded that it feasible to consider the thermal gradient within the package accompanied with the mechanical analysis, and the subsequent effects of the inherent defects on the overall structural integrity of the package are discussed.

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PZT 세라믹 레조네이터 무연솔더 접합부의 열-기계적 피로 가속수명 (Accelerated Thermo-Mechanical Fatigue Life of Pb-Free Solder Joints for PZT Ceramic Resonator)

  • 홍원식;박노창;오철민
    • 한국재료학회지
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    • 제19권6호
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    • pp.337-343
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    • 2009
  • In this study, we optimized Pb-free Sn/Ni plating thickness and conditions were optimized to counteract the environmental regulations, such as RoHS and ELV(End-of Life Vehicles). The $B_{10}$ life verification method was also suggested to have been successful when used with the accelerated life test(ALT) for assessing Pb-free solder joint life of piezoelectric (PZT) ceramic resonator. In order to evaluate the solder joint life, a modified Norris-Landzberg equation and a Coffin-Manson equation were utilized. Test vehicles that were composed of 2520 PZT ceramic resonator on FR-4 PCB with Sn-3.0Ag-0.5Cu for ALT were manufactured as well. Thermal shock test was conducted with 1,500 cycles from $(-40{\pm}2)^{\circ}C$ to $(120{\pm}2)^{\circ}C$, and 30 minutes dwell time at each temperature, respectively. It was discovered that the thermal shock test is a very useful method in introducing the CTE mismatch caused by thermo-mechanical stress at the solder joints. The resonance frequency of test components was measured and observed the microsection views were also observed to confirm the crack generation of the solder joints.

수치해석에 의한 초박형 패키지의 휨 현상 및 응력 특성에 관한 연구 (Numerical Study of Warpage and Stress for the Ultra Thin Package)

  • 송차규;좌성훈
    • 마이크로전자및패키징학회지
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    • 제17권4호
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    • pp.49-60
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    • 2010
  • 최근 휴대폰, PDA 등과 같은 모바일 전자 기기들의 사용이 급증하면서 다기능, 고성능, 초소형의 패키지가 시장에서 요구되고 있다. 따라서 사용되는 패키지의 크기도 더 작아지고 얇아지고 있다. 패키지에 사용되는 실리콘 다이 및 기판의 두께가 점점 얇아지면서 휨 변형, 크랙 발생, 및 기타 여러 신뢰성 문제가 크게 대두되고 있다. 이러한 신뢰성 문제는 서로 다른 패키지 재료의 열팽창계수의 차이에 의하여 발생된다. 따라서 초박형의 패키지의 경우 적절한 패키지물질과 두께 및 크기 등의 선택이 매우 중요하다. 본 논문에서는 현재 모바일 기기에 주로 사용되고 있는 CABGA, fcSCP, SCSP 및 MCP (Multi-Chip Package) 패키지에 대하여 휨과 응력의 특성을 수치해석을 통하여 연구하였다. 특히 휨 현상에 영향을 줄 수 있는 여러 중요 인자들, 즉 EMC 몰드의 두께 및 물성(탄성계수 및 열팽창 계수), 실리콘 다이의 두께와 크기, 기판의 물성 등이 휨 현상에 미치는 영향을 전반적으로 고찰하였다. 이를 통하여 휨 현상 메커니즘과 이를 제어하기 위한 중요 인자를 이해함으로써 휨 현상을 최소화 하고자 하였다. 휨 해석 결과 가장 큰 휨 값을 보인 SCSP에 대하여 실험계획법의 반응표면법을 이용하여 휨이 최소화되는 최적 조합을 구하였다. SCSP 패키지에서 휨에 가장 큰 영향을 미치는 인자는 EMC 두께 및 열팽창 계수, 기판의 열팽창계수, 그리고 실리콘 다이의 두께였다. 궁극적으로 최적화 해석을 통하여 SCSP의 휨을 $10{\mu}m$로 줄일 수 있음을 알 수 있었다.

이방성 전도 접착제 물성과 유기 기판 플립 칩의 신뢰성에 미치는 비전도성 충진재의 영향 (Effect of Non-Conducting Filler Additions on Anisotropic Conductive Adhesives(ACAs) Properties and the Reliability of ACAs Flip Chip on Organic Substrates)

  • 임명진;백경욱
    • 한국재료학회지
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    • 제10권3호
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    • pp.184-190
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    • 2000
  • 비전도성 충진재를 포함한 개선된 이방성 전도 접착제의 열적/기계적 특성과 이를 이용한 유기 기판용 플립 칩의 신뢰성에 미치는 충진재 양의 영향을 고찰하였다. 비전도성 충진재 양이 다른 개선된 이방성 접착제의 특성을 살펴보기 위해 differential scanning calorimeter (DSC), thermo-gravimetric analyzer (TGA), dynamic mechanical analyzer (DMA), thermo-mechanical analyzer (TMA)을 사용하였다. 비전도성 충진재의 양이 증가함에 따라 열팽창계수는 감소하였고, 상온에서의 storage modulus는 증가하였다. 추가로, 충진재의 양이 증가하면 DSC에 의한 유리전이온도와 TMA에 의한 유리전이온도도 증가하였다. 그러나 TGA 거동은 거의 변화가 없었다. 이방성 전도 접착제를 사용한 유기 기판 플립 칩의 신뢰성 테스트를 위해 열주기 시험, 고온고습 시험, 고온건조 시험을 수행하였는데, 주로 열주기 시험에서 이방서 전도 접착제의 열팽창계수의 영향이 컸다. 비전도성 충진재를 포함해서 낮은 열팽창계수와 높은 storage modulus를 갖는 이방성 전도 접착제에 의해 부착된 플립 칩의 신뢰성이 비전도성 충진재를 포함하지 않은 이방성 전도 접착제에 의한 플립 칩의 신뢰성보다 더 좋게 나타났다.

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