• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.2
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• pp.846-864
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• 2017

Software Defined Network (SDN) realizes management and control over the underlying forwarding device, along with acquisition and analysis of network topology and flow characters through south bridge protocol. Data path Identification (DPID) is the unique identity for managing the underlying device, so forged DPID can be used to attack the link of underlying forwarding devices, as well as carry out DoS over the upper-level controller. This paper proposes a dynamic defense method based on Client-Puzzle model, in which the controller achieves dynamic management over requests from forwarding devices through generating questions with multi-level difficulty. This method can rapidly reduce network load, and at the same time separate attack flow from legal flow, enabling the controller to provide continuous service for legal visit. We conduct experiments on open-source SDN controllers like Fluid and Ryu, the result of which verifies feasibility of this defense method. The experimental result also shows that when cost of controller and forwarding device increases by about 2%-5%, the cost of attacker's CPU increases by near 90%, which greatly raises the attack difficulty for attackers.

• Journal of Institute of Control, Robotics and Systems
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• v.6 no.2
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• pp.207-216
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• 2000

This paper introduces an effective system design method to develop a customer oriented product using a design optimization process and to select a set of critical design paramenters,. The process results in the development of a successful product satisfying customer needs and reducing development risk. The proposed scheme adopted a five step QFD(Quality Function Deployment) in order to extract design parameters from customer needs and evaluated their priority using risk factors for extracted design parameters. In this process we determine critical design parameters and allocate them to subsystem designers. Subsequently design engineers develop and test the product based on these parameters. These design parameters capture the characteristics of customer needs in terms of performance cost and schedule in the process of QFD, The subsequent risk management task ensures the minimum risk approach in the presence of design parameter uncertainty. An application of this approach was demonstrated in the development of weld quality monitoring system. Dominant design parameters affect linearity characteristics of weld defect feature vectors. Therefore it simplifies the algorithm for adopting pattern classification of feature vectors and improves the accuracy of recognition rate of weld defect and the real time response of the defect detection in the performance. Additionally the development cost decreases by using DSP board for low speed because of reducing CPU's load adopting algorithm in classifying weld defects. It also reduces the cost by using the single sensor to measure weld defects. Furthermore the synergy effect derived from the critical design parameters improves the detection rate of weld defects by 15% when compared with the implementation using the non-critical design parameters. It also result in 30% saving in development cost./ The overall results are close to 95% customer level showing the effectiveness of the proposed development approach.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.8 no.5
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• pp.137-147
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• 2008

Recently, Power and thermal management are becoming major concerns in computer system design. The energy efficiency is an important attribute of the mobile and embedded systems. Today's powerful mobile processors needs more energy and longer battery life. Many research has been focused to reduce energy consumption for the mobile processors.In this paper, performance monitoring system for the Power-management techniques is implemented for Intel's XScale microarchitecture-based Marvell PXA320 processor on Windows CE platform. It also provides software interface for changing DVFS configuration. Performance and power consumption are measured for benchmark programs through performance counter value and voltage/current measurements on LabVIEW platform. By using the developed monitoring system, it is possible for dynamic power management to track processor's workload and to determine the actual power consumption.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.6
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• pp.1323-1333
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• 1997

In this paper, we propose an efficient architecture for a high-speed cell concentrator/distributor(HCCD) in an ATM(Asynchronous Transfer Mode) switch and by analyzeing the simulation results evaluate the performance of the proposed architecuture. The proposed HCCD distributes cells from a switch link to local processors, or concentrates cells from local processor s to a switch link. This design is to guarntee a high throughput for the IPC (inter-processor communication) link in a distributed ATM switching system. The HCCD is designed in a moudlar architecture to provide the extensibility and the flexibility. The main characteristics of the HCCD are 1) Adaption of a local CPU in HCCD for improving flexibility of the system, 2) A cell-baced statistical multiplexing function for efficient multiplexing, 3) A cell distribution function based on VPI(Virtual Path Identifier), 4) A bypassing capability for IPC between processor attached to the same HCCD, 5) A multicasting capability for point-to-multipoint communication, 6) A VPI table updating function for the efficient management of links, 7) A self-testing function for detecting system fault.

• Proceedings of the Korean Information Science Society Conference
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• 2006.10c
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• pp.77-82
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• 2006

최근 컴퓨팅 환경은 클라이언트-서버(client-server) 환경에서 웹(World Wide Web)을 기반으로 한 분산 컴퓨팅(distributed computint) 환경으로 변화하고 있다. 그에 따라 XML 문서의 사용과 XML 문서의 양이 급속하게 증가하였다. 언제 어디서나 쉽게 필요한 XML 문서에 접근해야하며, 이러한 응용을 위해 짧은 시간 내에 그 정보를 전달할 수 있어야 한다. 이에 따라 분산 환경에서의 XML 문서의 처리가 요구된다. XML 데이터를 분산 데이터베이스의 특성을 이용하여 저장, 관리, 질의하는 분산 XML 데이터베이스 시스템(Distributed XML Database System)의 사용의 필요성이 증가하고 있다. 이에 따라, 사이트의 자치성, 질의 최적화, 데이터의 투명성 등에 큰 영향을 미치는 분산 XML 데이터베이스 시스템에서의 카탈로그 관리 기법의 연구의 필요성이 증가하게 된다. 본 논문에서는 중앙 집중식 카탈로그와 완전 중복식 카탈로그, 분할식 카탈로그를 분산 XML 데이터베이스 시스템에서 CPU 비용, I/O 비용, 동시성 제어, 이단계 완료 프로토콜, 큐잉 지연 등을 모두 고려한 모델을 설계하였고, 이를 시뮬레이터로 구현하여 각 카탈로그 관리 기법들의 성능을 합리적인 환경 설정을 통해 시뮬레이션함으로써 카탈로그 관리 기법들의 성능을 평가하였다.

• Proceedings of the Korea Information Processing Society Conference
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• 2017.04a
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• pp.795-798
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• 2017

최근 멀티코어 프로세서가 개발됨에 따라 병렬 프로그래밍은 멀티코어를 효과적으로 활용하기 위한 기법으로 그 중요성이 높아지고 있다. 트랜잭셔널 메모리는 처리 방식에 따라 HTM, STM, HyTM으로 구분되며, 최근 HTM 및 STM 결합한 HyTM 이 활발히 연구되고 있다. 그러나 기존의 HyTM 는 HTM과 STM의 동시성 제어를 위해 블룸필터를 사용하는 반면, 블룸필터의 자체적인 긍정 오류를 해결하지 못한다. 아울러, 트랜잭션 처리를 위한 메모리 할당/해제를 기존의 락 메커니즘을 사용하여 관리한다. 따라서 멀티코어 환경에서 스레드 수가 증가할수록 트랜잭션 처리 효율이 떨어진다. 본 논문에서는 멀티코어 환경에서 효율적인 트랜잭션 처리를 위한 메모리 관리 기반 하이브리드 트랜잭셔널 메모리 기법을 제안한다. 제안하는 기법은 트랜잭션 처리에 최적화된 블룸필터를 제공함으로써, 병렬적으로 동시에 수행되는 서로 다른 환경의 트랜잭션에 대해 일관성 있는 처리를 지원한다. 아울러, CPU 캐시라인에 최적화된 메모리 기법을 통해, 메모리 할당량이 적은 트랜잭션은 로컬 캐시에 할당함으로써 트랜잭션의 빠른 처리를 지원한다.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.12 no.8
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• pp.3946-3965
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• 2018

Network anomaly detection in Software Defined Networking, especially the detection of DDoS attack, has been given great attention in recent years. It is convenient to build the Traffic Matrix from a global view in SDN. However, the monitoring and management of high-volume feature-rich traffic in large networks brings significant challenges. In this paper, we propose a moving window Principal Components Analysis based anomaly detection and mitigation approach to map data onto a low-dimensional subspace and keep monitoring the network state in real-time. Once the anomaly is detected, the controller will install the defense flow table rules onto the corresponding data plane switches to mitigate the attack. Furthermore, we evaluate our approach with experiments. The Receiver Operating Characteristic curves show that our approach performs well in both detection probability and false alarm probability compared with the entropy-based approach. In addition, the mitigation effect is impressive that our approach can prevent most of the attacking traffic. At last, we evaluate the overhead of the system, including the detection delay and utilization of CPU, which is not excessive. Our anomaly detection approach is lightweight and effective.

• Proceedings of the Korea Information Processing Society Conference
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• 2012.04a
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• pp.1171-1173
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• 2012

이제는 하나뿐인 지구를 지키고 살리는 녹색혁명의 시대에 살고 있다. 이에 따라 컴퓨팅의 환경도 그린 컴퓨팅 환경으로 바뀌어지고 있다. 그린 컴퓨팅은 컴퓨팅 작업에 소모되는 에너지를 줄여보자는 것으로서 컴퓨터에 대한 전력을 절감함으로써 에너지 비용 절감, 저탄소 환경으로 구성하는 것이다. 그린 컴퓨팅은 녹색 ICT(Information ＆ Communication Technology)의 일환으로, 컴퓨터 자체를 움직이는 여러 에너지들 뿐만 아니라 컴퓨터의 냉각과 구동 및 주변기가들을 작동시키는데 소모되는 전력 등을 줄이기 위해서 CPU나 GPU등 각종 프로세서들의 재설계, 대체에너지 등을 활용하는 방안 등 탄소배출을 최소화시키는 등의 환경을 보호하는 개념의 컴퓨팅이다. Christian Belady 2007년 2월, Electronics Cooling Magazine의 통계에 의하면 2001년에는 인프라 비용과 전력 비용의 합이 서버의 가격과 같았고, 2004년에는 인프라 비용이 서버 비용과 같아졌다. 그런데, 2008년에는 에너지 비용 하나만으로도 서버 비용과 같아졌다는 것을 알 수 있습니다. 이제 그린 IT, 그린 컴퓨팅은 하면 좋고, 안하고 말고가 아닌 하지 않으면 생존할 수 없는 필수적인 것으로 되어가고 있다. 본 논문에서는 KISTI 슈퍼컴퓨터에서의 그린 컴퓨팅을 구현하기 위하여 먼저 이를 적용하기 위한 서버 시스템을 설계 구축하고 각각의 프로그램을 개발하여 테스트하였다.

• Journal of Information Processing Systems
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• v.18 no.3
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• pp.428-442
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• 2022

A reliable automatic passenger counting (APC) system is a key point in transportation related to the efficient scheduling and management of transport routes. In this study, we introduce a lightweight head detection network using deep learning applicable to an embedded system. Currently, object detection algorithms using deep learning have been found to be successful. However, these algorithms essentially need a graphics processing unit (GPU) to make them performable in real-time. So, we modify a Tiny-YOLOv3 network using certain techniques to speed up the proposed network and to make it more accurate in a non-GPU environment. Finally, we introduce an APC system, which is performable in real-time on embedded systems, using the proposed head detection algorithm. We implement and test the proposed APC system on a Samsung ARTIK 710 board. The experimental results on three public head datasets reflect the detection accuracy and efficiency of the proposed head detection network against Tiny-YOLOv3. Moreover, to test the proposed APC system, we measured the accuracy and recognition speed by repeating 50 instances of entering and 50 instances of exiting. These experimental results showed 99% accuracy and a 0.041-second recognition speed despite the fact that only the CPU was used.

• International Journal of Computer Science & Network Security
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• v.22 no.10
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• pp.230-236
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• 2022

Objectives: The primary goal of this article is to compare the multiple algorithms used for deadlock handling methods and then outline the common method in deadlock handling methods. Methods: The article methodology begins with introducing a literature review studying different algorithms used in deadlock detection and many algorithms for deadlocks prevented, recovered, and avoided. Discussion and analysis of the literature review were done to classify and compare the studied algorithms. Findings: The results showed that the deadlock detection method solves the deadlock. As soon as the real-time deadlock detection algorithm is identified and indicated, it performs better than the non-real-time deadlock detection algorithm. Our novelty the statistics that we get from the percentages of reviewing outcomes that show the most effective rate of 47% is in deadlock prevention. Then deadlock detection and recovery with 28% finally, a rate of 25% for deadlock avoidance.