• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.9
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• pp.19-27
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• 1998

The Transmitter part of single RF transceiver chip for an extended GSM handset application was circuit-designed, fabricated adn evaluated. The RF-IC Chip was processed by 0.8${\mu}m$ Si BiCMOS, 80 pin TQFP of $10 {\times} 10mm$ size, 3.3V operated RF-IC reveals, in general, quite reasonable integrity and RF performances. This paper describes development resuts of RF transmitter section, which includes IF/RF up-conversion mixer, IF/RF polyphase and pre-amplifier. The test results show that RF transmitter section is well operated within frequency range of 880~915MHz, which is defined on the extended GSM(E-GSM) specification. The transmitter section also reveals moderate power consumption of 71mA and total output power of 8.2dBm.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.4
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• pp.32-42
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• 2007

The substrate resistance is modeled to estimate the performance degradation of analog circuits by substrate noise in a $0.35{\mu}m$ twin-well non-epitaxial CMOS process. The substrate resistance model equations are applied to the P+ guard-ring isolation structure and a good match was achieved between measurements and models. The substrate resistance is divided into four types and a semi-empirical model equation is obtained for each type of substrate resistance. The rms(root-mean-square) error of the substrate resistance model is below 10% compared with the measured resistance. To apply this substrate resistance model to the P+ guard ring structure, ADS(Advanced Design System) circuit simulation results are compared with the measurement results using Network Analyzer, and relatively good agreements are obtained between measurements and simulations.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.5A
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• pp.496-503
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• 2010

The implementation of a RF transceiver for WRAN(Wireless Regional Area Network) system based on IEEE 802.22 standard using Cognitive Radio technology is presented in this paper. A CMOS RF transceiver IC for WRAN system operates in VHF/UHF(54~862MHz) broadband, and employs dual-path direct-conversion configuration and the in-band harmonic distortions are effectively suppressed by exploiting the dual-path direct conversion architecture. For 64QAM(3/4 coding rate) OFDM signal, an EVM of <-31.4dB(2.7%) has been achieved at 10dBm off-chip PA output power and the total chip area with pads is 12.95 mm2. The experimental results show that the proposed CMOS RF transceiver IC has perfect performance for WRAN system based on TDD(Time Division Duplex) mode.

• Journal of Sensor Science and Technology
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• v.5 no.1
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• pp.43-50
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• 1996

This paper presents a manufacture of the multiple subjects biotelemetry system using custom CMOS IC fabricated $1.5{\mu}m$ n-well process technology. The implantable circuits of the system except sensor interface circuits including FM transmitter are fabricated on a single chip with the sire of $4{\times}4mm^{2}$. It is possible to assemble the implantable system in a hybrid package as small as $3{\times}3{\times}2.5cm$ by using this chip, It's main function is to enable continuous measurement simultaneously up to 7-channel physiological signals from the selected one among 8 subjects. Another features of this system are to enable continuous measurement of physiological signals, and to accomplish ON/OFF switching of an implanted battery by subject selection signal with command signal from the external circuit. If this system is coupled with another appropriate sensors in medical field, various physiological parameters such as pressure, pH and temperature are to be measured effectively in the near future.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.10
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• pp.61-66
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• 2007

A gain enhancement rail-to-rail buffer amplifier for liquid crystal display (LCD) source driver is proposed. An op-amp with extremely high gain is needed to decrease the offset voltage of the buffer amplifier. Cascoded floating current source and class-AB control block in the op-amp achieve a high voltage gain by reducing the channel length modulation effect in high voltage technologies. HSPICE simulation in $1\;{\mu}V$ 15 V CMOS process demonstrates that voltage gain is increased by 30 dB. The offset voltage is improved from 6.84 mV to $400\;{\mu}V$. Proposed op-amp is fabricated in an LCD source driver IC and overall system offset voltage is decreased by 2 mV.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.251-256
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• 1999

RF CMOS 집적회로 기술은 CMOS 기술의 급격한 발전과 더불어 최근 크게 주목 받고 있다. 이는 CMOS가 제공 할 수 대량생산 능력으로 인해 기존 RF IC의 저가격화뿐 아니라 미래의 복합.다기능 무선 멀티미디어 단말기 구현을 위란 single chip solution을 제공 할 수 있는 가능성이 가장 높기 때문이다. 본 논문은 먼저 개인 휴대 통신 단말기 시장을 전망해보고, 향후 전개될 다양한 무선서비스에 대응하기 위한 RF CMOS 집적회로의 소자 및 설계 기술개발 현황과 향후의 발전 전망을 기술한다.

• Journal of the Korean Institute of Telematics and Electronics
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• v.24 no.4
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• pp.652-657
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• 1987

This paper describes an application of CMOS Gate Array Integrated Cricuits to the implementation of three functional units: A Multiplexer, Time Switch, and Demultiplexer in the Switching Network and Digital Line Concentrator of TDX-1 system, which is a fully digital time division electronic switching system in Korea. The application of CMOS Gate Array Integrated Circuits significantly improves the overall system performance in terms of power consumption, cost, size, reliability, and timing margin, etc.

• Proceedings of the IEEK Conference
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• 2002.07c
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• pp.1878-1881
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• 2002

The capacitance of nonlinear component such as a CMOS inverter varies largely around the threshold voltage. We measured the far-end crosstalk of two parallel microstrip lines with the CMOS inverter load near the threshold voltage of the CMOS inverter, The negative voltage of the crosstalk agrees with that for a 4pF capacitor toad. The positive voltage of the crosstalk hardly changes of the amplitude of the input step voltage.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.2
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• pp.147-155
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• 2002

This paper describes RF front-end transceiver chipset for the dual-mode operation of PCS-Korea and IMT-2000. The transceiver chipset has been implemented in a $0.25\mutextrm{m}$ single-poly five-metal CMOS technology. The receiver IC consists of a LNA and a down-mixer, and the transmitter IC integrates an up-mixer. Measurements show that the transceiver chipset covers the wide RF range from 1.8GHz for PCS-Korea to 2.1GHz for IMT-2000. The LNA has 2.8~3.1dB NF, 14~13dB gain and 5~4dBm IIP3. The down mixer has 15.5~16.0dB NF, 15~13dB power conversion gain and 2~0dBm IIP3. The up mixer has 0~2dB power conversion gain and 6~3dBm OIP3. With a single 3.0V power supply, the LNA, down-mixer, and up-mixer consume 6mA, 30mA, and 25mA, respectively.

• Journal of IKEEE
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• v.1 no.1 s.1
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• pp.1-10
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• 1997

It is well-known that rectangular bulk-Si sensors prepared by etch or epi etch-stop micromachining technology are already in practical use today, but the conventional bulk-Si sensor shows some drawbacks such as large chip size and limited applications as silicon sensor device is to be miniaturized. We consider a circular-shape SOI(Silicon-On-Insulator) micro-cavity technology to facilitate multiple sensors on very small chip, to make device easier to package than conventional sensor like pressure sensor and to provide very high over-pressure capability. This paper demonstrates the cross-functional results for stress analyses(targeting $5{\mu}m$ deflection and 100MPa stress as maximum at various applicable pressure ranges), for finding permissible diaphragm dimension by output sensitivity, and piezoresistive sensor theory from two-type SOI structures where the double SOI structure shows the most feasible deflection and small stress at various ambient pressures. Those results can be compared with the ones of circular-shape bulk-Si based sensor$^{[17]}. The SOI micro-cavity formed the sensors is promising to integrate with calibration, gain stage and controller unit plus high current/high voltage CMOS drivers onto monolithic chip.