• 한국초전도저온공학회:학술대회논문집
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• 한국초전도저온공학회 2003년도 추계학술대회 논문집
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• pp.153-156
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• 2003

The multi-layer oxide buffer layer for the coated conductor was deposited on biaxially textured Ni substrates using pulsed laser deposition. Oxygen partial pressure, 4％$H_2$/Ar partial pressure, and deposition temperature were deposition variables investigated to find the optimum deposition conditions. $Y_2$O$_3$seed layer was deposited epitaxially on metal substrate. The full buffer architecture of $Y_2$O$_3$/YSZ/CeO$_2$was successfully prepared on metal substrate.

• 한국전기전자재료학회논문지
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• 제30권8호
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• pp.491-495
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• 2017

We investigated solution-processed indium-zinc oxide (IZO) thin-film transistors (TFTs) by inserting a 2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole (PBD) buffer layer. This buffer layer efficiently tuned the energy level between the semiconducting oxide channel and metal electrode by increasing charge extraction, thereby enhancing the overall device performance: the IZO TFT with embedded PBD layer (thickness: 5 nm; width: $2,000{\mu}m$; length: $200{\mu}m$) exhibited a field-effect mobility of $1.31cm^2V^{-1}s^{-1}$, threshold voltage of 0.12 V, subthreshold swing of $0.87V\;decade^{-1}$, and on/off current ratio of $9.28{\times}10^5$.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2007년도 추계학술발표대회 및
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• pp.46.1-46.1
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• 2007

• 한국재료학회:학술대회논문집
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• 한국재료학회 1997년도 한국재료학회 추계학술발표회
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• pp.143-143
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• 1997

• 한국재료학회:학술대회논문집
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• 한국재료학회 1999년도 춘계학술발표강연 및 눈문개요집
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• pp.27-27
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• 1999

• 한국세라믹학회:학술대회논문집
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• 한국세라믹학회 2002년도 추계총회 및 연구발표회 초록집
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• pp.100.2-100
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• 2002

• 한국표면공학회:학술대회논문집
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• 한국표면공학회 2001년도 추계학술발표회 초록집
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• pp.26-27
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• 2001

• 한국초전도학회:학술대회논문집
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• 한국초전도학회 2005년도 High Temperature Superconductivity Vol.XV
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• pp.51-51
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• 2005

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.326-329
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• 2002

In this paper, we investigated a feasibility of cerium oxide(CeO$_2$) films as a buffer layer of MFIS(metal ferroelectric insulator semiconductor) type capacitor. CeO$_2$ layer were Prepared by two step process of a low temperature film growth and subsequent RTA (rapid thermal annealing) treatment. By app1ying an ultra thin Ce metal seed layer and N$_2$ Plasma treatment, dielectric and interface properties were improved. It means that unwanted SiO$_2$ layer generation was successfully suppressed at the interface between He buffer layer and Si substrate. The lowest lattice mismatch of CeO$_2$ film was as low as 1.76% and average surface roughness was less than 0.7 m. The Al/CeO$_2$/Si structure shows breakdown electric field of 1.2 MV/cm, dielectric constant of more than 15.1 and interface state densities as low as 1.84${\times}$10$\^$11/ cm$\^$-1/eV$\^$-1/. After N$_2$ plasma treatment, the leakage current was reduced with about 2-order.

• 한국재료학회지
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• 제17권2호
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• pp.115-120
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• 2007

Polycrystalline silicon (poly-Si) thin film transistors (TFTs) might be fabricated on the mica substrate and transferred to a flexible plastic substrate because mica can be easily cleaved into a thin layer. To overcome the adhesion and stress problem between poly-Si film and mica substrate, a buffer layer consisting of $SiO_x/Ta/Ti$ three layers has been developed. The $SiO_x$ layer is for electrical isolation, the Ti layer is for adhesion of $SiO_{x}$ and mica. and Ta is for stress relief between $SiO_x$ and Ti. A TFT was fabricated on the mica substrate by a conventional Si process and was successfully transferred to a plastic substrate.