• 제목/요약/키워드: Bottom oxide

검색결과 258건 처리시간 0.028초

금속 나노와이어의 제조와 특성 (Metal nano-wire fabrication and properties)

  • 보보무로드 함라쿠로프;김인수
    • 한국소성가공학회:학술대회논문집
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    • 한국소성가공학회 2009년도 춘계학술대회 논문집
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    • pp.432-434
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    • 2009
  • Metal nano-wire arrays on Cu-coated seed layers were fabricated by aqueous solution method using sulfate bath at room temperature. The seed layers were coated on Anodic aluminum oxide (AAO) bottom substrates by electrochemical deposition technique, length and diameter of metal nano-wires were dominated by controlling the deposition parameters, such as deposition potential and time, electrolyte temperature. Anodic aluminum oxide (AAO) was used as a template to prepare highly ordered Ni, Fe, Co and Cu multilayer magnetic nano-wire arrays. This template was fabricated with two-step anodizing method, using dissimilar solutions for Al anodizing. The pore of anodic aluminum oxide templates were perfectly hexagonal arranged pore domains. The ordered Ni, Fe, Co and Cu systems nano-wire arrays were characterized by Field Emission Scanning Electron Microscopy (FE-SEM) and Vibrating Sample Magnetometer (VSM). The ordered Ni, Fe, Co and Cu systems nano-wires had different preferred orientation. In addition, these nano-wires showed different magnetization properties under the electrodepositing conditions.

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Highly stable Zn-In-Sn-O TFTs for the Application of AM-OLED Display

  • Ryu, Min-Ki;KoPark, Sang-Hee;Yang, Shin-Hyuk;Cheong, Woo-Seok;Byun, Chun-Won;Chung, Sung-Mook;Kwon, Oh-Sang;Park, Eun-Suk;Jeong, Jae-Kyeong;Cho, Kyoung-Ik;Cho, Doo-Hee;Lee, Jeong-Ik;Hwang, Chi-Sun
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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    • pp.330-332
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    • 2009
  • Highly stable bottom gate thin film transistors(TFTs) with a zinc indium tin oxide(Zn-In-Sn-O:ZITO) channel layer have been fabricated by rf-magnetron co-sputtering using a indium tin oxide(ITO:90/10), a tin oxide and a zinc oxide targets. The ZITO TFT (W/L=$40{\mu}m/20{\mu}m$) has a mobility of 24.6 $cm^2$/V.s, a subthreshold swing of 0.12V/dec., a turn-on voltage of -0.4V and an on/off ratio of >$10^9$. When gate field of $1.8{\times}10^5$ V/cm was applied with source-drain current of $3{\mu}A$ at $60^{\circ}C$, the threshold voltage shift was ~0.18 V after 135 hours. We fabricated AM-OLED driven by highly stable bottom gate Zn-In-Sn-O TFT array.

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저전압 구동용 전기스위치와 미러 어레이 응용을 위한 새로운 표면미세가공기술 (A New Surface Micromachining Technology for Low Voltage Actuated Switch and Mirror Arrays)

  • 박상준;이상우;김종팔;이상우;이상철;김성운;조동일
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1998년도 하계학술대회 논문집 G
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    • pp.2518-2520
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    • 1998
  • Silicon can be reactive ion etched (RIE) either isotropically or anisotropically. In this paper, a new micromachining technology combining these two etching characteristics is proposed. In the proposed method, the fabrication steps are as follows. First. a polysilicon layer, which is used as the bottom electrode, is deposited on the silicon wafer and patterned. Then the silicon substrate is etched anisotropically to a few micrometer depth that forms a cavity. Then an PECVD oxide layer is deposited to passivate the cavity side walls. The oxide layers at the top and bottom faces are removed while the passivation layers of the side walls are left. Then the substrate is etched again but in an isotropic etch condition to form a round trench with a larger radius than the anisotropic cavity. Then a sacrificial PECVD oxide layer is deposited and patterned. Then a polysilicon structural layer is deposited and patterned. This polysilicon layer forms a pivot structure of a rocker-arm. Finally, oxide sacrificial layers are etched away. This new micromachining technology is quite simpler than conventional method to fabricate joint structures, and the devices that are fabricated using this technology do not require a flexing structure for motion.

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Top Emission Organic EL Devices Having Metal-Doped Cathode Interface Layer

  • Kido, Junji
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2002년도 International Meeting on Information Display
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    • pp.1081-1081
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    • 2002
  • Top emission organic EL devices were fabricated by using metal-doped cathode interface layer to achieve low drive voltages. Also, facing-targets-type sputtering was used to sputter indium-tin oxide layer on top of organic active layer. The devices fabricated in this study showed reasonably high external quantum efficiency of about 1 % which is comparable to that of bottom-emission-type devices.

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Trench MOSFET Technology의 Deep Trench 구조에서 WET Cleaning 영향에 대한 연구 (The Study of WET Cleaning Effect on Deep Trench Structure for Trench MOSFET Technology)

  • 김상용;정우양;이근만;김창일
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.88-89
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    • 2009
  • In this paper, we investigated about wet cleaning effect as deep trench formation methods for Power chip devices. Deep trench structure was classified by two methods, PSU (Poly Stick Up) and Non-PSU structure. In this paper, we could remove residue defect during wet. cleaning after deep trench etch process for non-PSU structure device as to change wet cleaning process condition. V-SEM result showed void image at the trench bottom site due to residue defect and residue component was oxide by EDS analysis. In order to find the reason of happening residue defect, we experimented about various process conditions. So, defect source was that oxide film was re-deposited at trench bottom by changed to hydrophobic property at substrate during hard mask removal process. Therefore, in order to removal residue defect, we added in-situ SCI during hard mask removal process, and defect was removed perfectly. And WLR (Wafer Level Reliability) test result was no difference between normal and optimized process condition.

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4.1” Transparent QCIF AMOLED Display Driven by High Mobility Bottom Gate a-IGZO Thin-film Transistors

  • Jeong, J.K.;Kim, M.;Jeong, J.H.;Lee, H.J.;Ahn, T.K.;Shin, H.S.;Kang, K.Y.;Park, J.S.;Yang, H,;Chung, H.J.;Mo, Y.G.;Kim, H.D.;Seo, H.
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권1호
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    • pp.145-148
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    • 2007
  • The authors report on the fabrication of thin film transistors (TFTs) that use amorphous indium-gallium-zinc oxide (a-IGZO) channel and have the channel length (L) and width (W) patterned by dry etching. To prevent the plasma damage of active channel, a 100-nm-thckness $SiO_{x}$ by PECVD was adopted as an etch-stopper structure. IGZO TFT (W/L=10/50${\mu}m$) fabricated on glass exhibited the high performance mobility of $35.8\;cm^2/Vs$, a subthreshold gate voltage swing of $0.59V/dec$, and $I_{on/off}$ of $4.9{\times}10^6$. In addition, 4.1” transparent QCIF active-matrix organic light-emitting diode display were successfully fabricated, which was driven by a-IGZO TFTs.

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Application of NiOx Anode for Bottom Emission Organic Light Emitting Diode

  • Kim, Young-Hwan;Kim, Jong-Yeon;Kim, Byoung-Yong;Han, Jeong-Min;Moon, Hyun-Chan;Park, Kwang-Bum;Seo, Dae-Shik
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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    • pp.448-448
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    • 2007
  • OLED has many advantages of low voltage operation, self radiation, light weight, thin thickness, wide view angle and fast response time to overcome existing liquid crystal display (LCD)'s weakness. Therefore, It draws attention as promising display and has already developed for manufactured goods. Also, OLED is regarded as a only substitute of flexible display with a thin display. However, Indium tin oxide(ITO) thin film for electrode of OLED shows a low electrical properties and is impossible to deposit at high thermal condition because electrical characteristics of ITO is getting worse. One of the ways to realize an improved flexible OLED is to use high internal efficiency electrodes, which have higher work function than those single layer of ITO films of the same thickness. The high internal efficiency electrodes film is developed with structure of nickel oxide for bottom Emission Type of OLED.

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심층 레지스터 구조를 이용한 서브미크론 상층패턴 형성 (Formation of Submicron Top Pattern by using Tri-Layer Resist Structure)

  • 심규환;양전욱;이진희;강진영;마동성
    • 대한전자공학회논문지
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    • 제25권5호
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    • pp.495-500
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    • 1988
  • The effectiveness of tri layer resist (TLR) technique is compared with that of single layer resist (SLR) technique in order to make a 0.8um pattern with the linewidth deviation of 10 percents. SLR technique is not appropriate to shape the micro-pattern on oxide and aluminum steps because of the standing wave effect and the light scattering effect in shaping the resist pattern. On the contrary, the uniform line with a width of 0.8um on oxide and aluminum steps can be formed by TLR technique, reducting such effects. The planarization and the light absorption coefficient of the bottom layer resist in TLR are optimized by exposing it to ultra violet light after baking it for 30min at 230\ulcorner. An uniform line with a width of 0.8um on oxide step is defined with the light absorption coefficient of 0.85 whereas that on aluminum step is defined with 0.95.

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Fabrication and Characteristics of Indium Tin Oxide Films on CR39 Substrate for OTFT

  • Kwon, Sung-Yeol
    • Transactions on Electrical and Electronic Materials
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    • 제7권5호
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    • pp.267-270
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    • 2006
  • The Indium tin oxide (ITO) films were deposited on CR39 substrate using DC magnetron sputtering. ITO thin films deposited at room temperature because CR39 substrates its glass-transition temperature of is $130^{\circ}C$. ITO thin films used bottom and top electrode and for organic thin film transparent transistor.(OTFT) ITO thin film electrodes electrical properties and optical transparency properties in the visible wavelength range (300 - 800 nm) strongly dependent on volume of oxygen percent. For the optimum resistivity and transparency of ITO thin film electrode achieved with a 75 W plasma power, 10 % volume of oxygen and a 27 nm/min deposition rate. Above 85 % transparency in the visible wavelength range (300 - 800 nm) measured without post annealing process and $9.83{times}10{-4}{\Omega}cm$ a low resistivity was measured thickness of 300 nm.