• Journal of the Korea Academia-Industrial cooperation Society
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• v.21 no.7
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• pp.12-19
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• 2020

The clustered heterogeneous wireless sensor network is comprised of sensor nodes and cluster heads, which are hierarchically organized for different objectives. In the network, we should especially take care of managing node resources to enhance network performance based on memory and battery capacity constraints. For instances, if some interesting events occur frequently in the vicinity of particular sensor nodes, those nodes might receive massive amounts of data. Data congestion can happen due to a memory bottleneck or link disconnection at cluster heads because the remaining memory space is filled with those data. In this paper, we utilize drones as mobile sinks to resolve data congestion and model the network, sensor nodes, and cluster heads. We also design a cost function and a congestion indicator to calculate the degree of congestion. Then we propose a data congestion map index and a data congestion mapping scheme to deploy drones at optimal points. Using control variable, we explore the relationship between the degree of congestion and the number of drones to be deployed, as well as the number of drones that must be below a certain degree of congestion and within communication range. Furthermore, we show that our algorithm outperforms previous work by a minimum of 20% in terms of memory overflow.

• KIPS Transactions on Software and Data Engineering
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• v.5 no.12
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• pp.623-634
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• 2016

Most of existing frequent pattern mining methods address time efficiency and greatly rely on the primary memory. However, in the era of big data, the size of real-world databases to mined is exponentially increasing, and hence the primary memory is not sufficient enough to mine for frequent patterns from large real-world data sets. To solve this problem, there are some researches for frequent pattern mining method based on disk, but the processing time compared to the memory based methods took very time consuming. There are some researches to improve scalability of frequent pattern mining, but their processes are very time consuming compare to the memory based methods. In this paper, we present PPFP as a novel disk-based approach for mining frequent itemset from big data; and hence we reduced the main memory size bottleneck. PPFP algorithm is based on FP-growth method which is one of the most popular and efficient frequent pattern mining approaches. The mining with PPFP consists of two setps. (1) Constructing an IFP-tree: After construct FP-tree, we assign index number for each node in FP-tree with novel index numbering method, and then insert the indexed FP-tree (IFP-tree) into disk as IFP-table. (2) Mining frequent patterns with PPFP: Mine frequent patterns by expending patterns using stack based PUSH-POP method (PPFP method). Through this new approach, by using a very small amount of memory for recursive and time consuming operation in mining process, we improved the scalability and time efficiency of the frequent pattern mining. And the reported test results demonstrate them.

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.2
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• pp.151-158
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• 2016

The HSA resolves an old problem with existing CPU and GPU architectures by allowing both units to directly access each other's memory pools via unified virtual memory. In a physically realized system, however, frequent data exchanges between CPU and GPU for a virtual memory block result bottlenecks and coherence request overheads. In this paper, we propose Fusion Processor Architecture for efficient access of main memory from both CPU and GPU. It consists of Job Manager, Re-mapper, and Pre-fetcher to control, organize, and distribute work loads and working areas for GPU cores. These components help on reducing memory exchanges between the two processors and improving overall efficiency by eliminating faulty page table requests. To verify proposed algorithm architectures, we develop an emulator based on QEMU, and compare several architectures such as CUDA(Compute Unified Device Architecture), OpenMP, OpenCL. As a result, Proposed fusion processor architectures show 198% faster than others by removing unnecessary memory copies and cache-miss overheads.

• Journal of Korean Society of Transportation
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• v.33 no.5
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• pp.478-487
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• 2015

This study proposed a Variable Speed Limits(VSL) algorithm to use traffic information based on Cumulative Demand-Capacity Analysis and evaluated its performance. According to the analysis result, the total of delay consisted of 3 separate parts. There was no change in total travel time although the total of delay decreased. These effects was analysed theoretically and then, evaluated through VISSIM, a microscopic simulator. VISSIM simulation results show almost same as those of theoretical analysis. Furthermore in SSAM analysis with VISSIM simulation log, the number of high risk collisions decreased 36.0 %. However, the total delay decrease effect is not real meaning of decrease effect because the drivers' desired speed is same whether the VSL model is operated or not. Nevertheless this VSL model maintains free flow speed for longer and increases the cycle of traffic speed fluctuation. In other words, this is decrease of delay occurrence and scale. The decrease of speed gap between upstream and downstream stabilizes the traffic flow and leads decrease number of high risk collision. In conclusion, we can expect increase of safety through total delay minimization according to this VSL model.

• Journal of the Korea Computer Graphics Society
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• v.17 no.3
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• pp.1-7
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• 2011

Recently, various researches have been proposed to accelerate GPU-based volume ray-casting. However, those researches may cause several problems such as bottleneck of data transmission between CPU and GPU, requirement of additional video memory for hierarchical structure and increase of processing time whenever opacity transfer function changes. In this paper, we propose an efficient GPU-based empty space skipping technique to solve these problems. We store maximum density in a brick of volume dataset on a vertex element. Then we delete vertices regarded as transparent one by opacity transfer function in geometry shader. Remaining vertices are used to generate bounding boxes of non-transparent area that helps the ray to traverse efficiently. Although these vertices are independent on viewing condition they need to be reproduced when opacity transfer function changes. Our technique provides fast generation of opaque vertices for interactive processing since the generation stage of the opaque vertices is running in GPU pipeline. The rendering results of our algorithm are identical to the that of general GPU ray-casting, but the performance can be up to more than 10 times faster.

• Journal of KIISE:Databases
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• v.35 no.1
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• pp.17-28
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• 2008

Recently, main memory access is a performance bottleneck for many computer applications. Cache memory is introduced in order to reduce memory access latency. However, it is possible for cache memory to reduce memory access latency, when desired data are located on cache. EST tree is proposed to solve this problem by improving T tree. However, when doing a range search, EST tree has to search unnecessary nodes. Therefore, this paper proposes $CST^+$ tree which has the merit of CST tree and is possible to do a range search by linking data nodes with linked lists. By experiments, we show that $CST^+$ is $4{\sim}10$ times as fast as CST and $CSB^+$. In addition, rebuilding an index Is an essential step for the database recovery from system failure. In this paper, we propose a fast tree index rebuilding algorithm called MaxPL. MaxPL has no node-split overhead and employs a parallelism for reading the data records and inserting the keys into the index. We show that MaxPL is $2{\sim}11$ times as fast as sequential insert and batch insert.