• Proceedings of the KIEE Conference
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• 1992.07a
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• pp.365-368
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• 1992

This paper presents an approach to the design of real time task scheduling for a line controller of continuous manufacturing process automation. The line controller has multiprocessor-based architecture with shared memory and is operated by firmware. This firmware contains menu-driven software supporting real-time database management and fuction-block control language. The multitasking line control processor performs the following three functions: 1) interprets the function block control language by virtue of shared memory in the database; 2) invokes an interupt service routine as required by external hardware; 3) detects errors and notifies the user. We propose real time task scheduling method.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.6
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• pp.974-979
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• 2002

There are so many kind of a control program that is applied in various process fields such as power generation plant, water treatment plant, incinerator plant, chemical plant, cement plant etc.. Because an engineer in field edits and changes and debugs and tests properly control programs using text-based control language, it is very hard for the him to apply to plant. Therefore, this research implemented a graphical tool for control program builder that is applicable to various plants and usable engineers having a little knowledge for control language. I wish to run more efficiently precision process control offering function that can see visual expression about flow of control signal and intermediate output values of control program displayed in screen using this implemented function block builder.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.31 no.3
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• pp.423-431
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• 2021

SPECK and SIMON are lightweight block ciphers developed by NSA(National Security Agency), and SIMECK is a new lightweight block cipher that combines the advantages of SPECK and SIMON. In this paper, a large-capacity encryption using SPECK, SIMON, and SIMECK is implemented using a GPU with efficient parallel processing. CUDA library provided by NVIDIA was used, and performance was maximized by using CUDA assembly language PTX to eliminate unnecessary operations. When comparing the results of the simple CPU implementation and the implementation using the GPU, it was possible to perform large-scale encryption at a faster speed. In addition, when comparing the implementation using the C language and the implementation using the PTX when implementing the GPU, it was confirmed that the performance increased further when using the PTX.

• Journal of Korea Multimedia Society
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• v.7 no.8
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• pp.1170-1182
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• 2004

A novel 4-way pipelined processing architecture is presented for three-step search block-matching motion estimation. For the 4-way pipelined processing, we have developed a method which divides the current block and search area into 4 subregions respectively and processes them concurrently. Also, we have developed memory partitioning method to access pixel data from 4 subregions concurrently without memory conflict. The architecture has been designed and simulated with C language and VHDL. Experimental results show that the proposed architecture achieves a high performance for real time motion estimation.

• International Journal of Advanced Culture Technology
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• v.8 no.3
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• pp.54-60
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• 2020

Online cybercrime has various causes. The criminal guilty language, Criminal lingo is active in the shaded area with the bilateral aspect of the word on cyber. It has been continuously producing massive risk factors in cyberspace. Criminals are shared and disseminated online. It has been linked with fake news and aids to suicide that has recently become an issue. Thus the criminal lingo has become a real danger factor on cyber interface. Recently, Criminal lingo is shared and distributed as cyber hazard information. It is transformed that damaging to the youth and ordinary people through the internet and social networks. In order to take action, it is necessary to construct an expert system based on AI to implement a smart management architecture with block-chain technology. In this paper, we study technically a new smart management architecture which uses artificial intelligence based decision algorithm and block-chain tracking technology to prevent the spread of criminal lingo factors in the evolving cyber world. In addition, through the off-line regular patrol program of police units, we proposed the conversion of online regular patrol program for "cyber harem area".

• 한국정보교육학회:학술대회논문집
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• 2011.01a
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• pp.203-209
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• 2011

This paper proposed new approach for the information gifted discrimination test usign EPL. We tried to distinguish high level thinking in the information gifted through test of this study. We designed discrimination test by the features of EPL and developed testing item tool like single-sprit and multi-sprite. These items are divided into adding block, changing the block order, modifying value io block, and changing a block. We designed this testing tool that the elementary students can solve items without an experience on learning programming language. We expect the testing tool io proposed this study will help to discriminate the information gifted effectively.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.44 no.2 s.314
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• pp.74-81
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• 2007

In this paper, an efficient SAD(Sum of Absolute Differences) processor structure for motion estimation of H.264 is proposed. SAD processors are commonly used both in full search methods for motion estimation and in fast search methods for motion estimation. Proposed structure consists of SAD calculator block, combinator block, and minimum value calculator block. Especially, proposed structure is simplified by using Distributed Arithmetic for addition operation. The Verilog-HDL(Hard Description Language) coding and FPGA(Field Programmable Gate Array) implementation results for the proposed structure show 39% and 32% gate count reduction in comparison with those of the conventional structure, respectively. Due to its efficient processing scheme, the proposed SAD processor structure can be widely used in size dominant H.264 chip.

• Journal of the Korean housing association
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• v.25 no.4
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• pp.83-91
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• 2014

The purpose of this study is to clarify the characteristics between the type of daily routine and spatial configuration of activity areas in classroom and provide alternatives for space planning of activity areas in classroom of child-care centers. This study used the content analysis on daily activity plan and floor plans through field survey. Analysis on floor plans was conducted for 35 classrooms in 9 child-care centers which allowed field survey. The results of this study were as follows; There was no significant difference for classroom size according to the type of daily routine in 3 to 5-year-old classrooms. The average size of classrooms was $61.6m^2$ for care oriented type, $41.4m^2$ for indoor activity oriented type and $48.8m^2$ for group activity oriented type. There was no significant difference in composition of activity areas in classrooms according to the type of daily routine. In case of 0 to 2-year-old classrooms, they were composed of 6 activity areas including gross-motor, role play, block building, language, creative expression, exploration/manipulation. Activity area of the most low frequency was gross-motor area. In case of 3 to 5-year-old classrooms, most classrooms were composed of all the 7 activity areas including art, tone and rhythmic, block building, role play, language, math and science. Most accessible and central areas in 0 to 2-year-old classrooms were gross-motor and role play. Also, most separate areas were exploration/manipulation and block building. Most accessible and central areas in 3 to 5-year-old classroom were art and math. Also, most separate areas were tone and rhythmic and science.

• Journal of The Korean Association of Information Education
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• v.23 no.2
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• pp.189-196
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• 2019

Artificial intelligence has begun to be used in various parts of our lives, and recently its sphere has been expanding. However, students tend to find it difficult to recognize artificial intelligence technology because education on artificial intelligence is not being conducted on elementary school students. This paper examined the teaching programming language and artificial intelligence teaching methods, and looked at the changes in students' attitudes toward artificial intelligence technology by conducting education on artificial intelligence. To this end, education on block-type programming language-based artificial intelligence technology was provided to students' level. And we looked at students' attitudes toward artificial intelligence technology through a single group pre-postmortem. As a result, it brought about significant improvements in interest in artificial intelligence, possible access to artificial intelligence technology and the need for education on artificial intelligence technology in schools.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.7B
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• pp.1393-1399
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• 1999

In this paper, a VLSI design of the convolutional codec chip of code rate r=l/3, and constraint length K=9 is presented, which is able to correct errors of the received data when transmitted data is corrupted in channels. The circuit design mainly aimed for simple implementation. In the decoder, Viterbi algorithm with 3-bit soft-decision is employed. For information sequence updating and storage, the register exchange method is employed, where the register length is 5$\times$K(45 stages). The codec chip is designed using VHDL language and Design Analyzer and VHDL Simulator of Synopsys are used for simulation and synthesis. The chip is composed of ENCODER block, ALIGN block, BMC block, ACS block, SEL_MIN block and REG_EXCH block. The operation of the codec chip is verified though the logic simulations, where several error conditions are assumed. As a result of the timing simulation after synthesis, the decoding speed of 325.5Kbps is achieved, and 6,894 gates is used.