• 한국정보통신설비학회:학술대회논문집
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• 2005.08a
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• pp.417-421
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• 2005

In the recent digital communication systems, the performance of Turbo Code using the error correction coding depends on the interleaver influencing the free distance determination and the recursive decoding algorithms that is executed in the turbo decoder. However, performance depends on the interleaver depth that needs many delays over the reception process. Moreover, turbo code has been known as the robust coding methods with the confidence over the fading channel. International Telecommunication Union(ITU) has recently adopted it as the standardization of the channel coding over the third generation mobile communications(IMT-2000). Therefore, in this paper, we proposed the interleaver that has the better performance than existing block interleaver, and modified turbo decoder that has the parallel concatenated structure using MAP algorithm. In the real-time voice and video service over third generation mobile communications, the performance of the proposed two methods was analyzed and compared with the existing methods by computer simulation in terms of reduced decoding delay using the variable decoding method over AWGN and fading channels for CDMA environments.

• IEMEK Journal of Embedded Systems and Applications
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• v.14 no.1
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• pp.1-9
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• 2019

In this paper, we propose a method of generating a 2D gray image from LiDAR 3D reflection intensity. The proposed method uses the Fully Convolutional Network (FCN) to generate the gray image from 2D reflection intensity which is projected from LiDAR 3D intensity. Both encoder and decoder of FCN are configured with several convolution blocks in the symmetric fashion. Each convolution block consists of a convolution layer with $3{\times}3$ filter, batch normalization layer and activation function. The performance of the proposed method architecture is empirically evaluated by varying depths of convolution blocks. The well-known KITTI data set for various scenarios is used for training and performance evaluation. The simulation results show that the proposed method produces the improvements of 8.56 dB in peak signal-to-noise ratio and 0.33 in structural similarity index measure compared with conventional interpolation methods such as inverse distance weighted and nearest neighbor. The proposed method can be possibly used as an assistance tool in the night-time driving system for autonomous vehicles.

• Journal of Broadcast Engineering
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• v.25 no.3
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• pp.338-345
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• 2020

Versatile Video Coding (VVC), which has been developing as a next generation video coding standard, has adopted various techniques to achieve more than twice the compression performance of HEVC (High Efficiency Video Coding). The recently released VVC Test Model (VTM) shows 38% Bjontegaard Delta bitrate (BD-rate) improvement and 9x/1.6x encoding/decoding complexity over HEVC. In order to reduce such increased complexity, various fast algorithms have been proposed. In this paper, gradient-based methods of fast intra mode decision and block splitting are presented. Experimental results show that, compared to VTM6.0, the proposed method gives up to 65% encoding time reduction with 3.54% BD-rate loss in All-Intra (AI) configuration.

• Journal of the Korea Society of Computer and Information
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• v.12 no.2 s.46
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• pp.63-70
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• 2007

The Data Encryption Standard (DES) is a block cipher that encrypts a 64 bit block of plaintext into a 64 bit block of ciphertext. The DES has been a worldwide standard for 20 years since it was adopted in 1976. strong. But, due to the rapid development of hardware techniques and cryptanalysis, the DES with 64-bit key is considered to be not secure at the present time. Therefore it became necessary to increase the security of DES. The NG-DES(New Generation DES)[1] is an encryption system which upgrades the encryption security of DES by the key extension and the usage of non-linear f function. It extends not only the size of plaintext and ciphertext to 128 bit but also the Fiestel structure used in each round. This structure has a weak point that the change of each bit of plaintext does not affect all bits of ciphertext simultaneously. In this paper, we propose a modified Fiestel structure of DES and thus increased confusion and diffusion by effectively cross-connecting between outputs in a round and inputs in next round.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.11
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• pp.66-76
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• 2009

The motion estimation in video encoding system occupies the biggest part. So, we require the motion estimator with efficient structure for real-time operation. And for motion estimator's implementation, it is desired to design hardware module of an exclusive use that perform the encoding process at high speed. This paper proposes motion estimation detection block(MED), 41 SADs(Sum of Absolute Difference) calculation block, minimum SAD calculation and motion vector generation block based on parallel processing. The parallel processing can reduce effectively the amount of the operation. The minimum SAD calculation and MED block uses the pre-computation technique for reducing switching activity of the input signal. It results in high-speed operation. The MED and 41 SADs calculation blocks are composed of adder tree which causes the problem of critical path. So, the structure of adder tree has changed the most commonly used ripple carry adder(RCA) with carry skip adder(CSA). It enables adder tree to operate at high speed. In addition, as we enabled to easily control key variables such as control signal of search range from the outside, the efficiency of hardware structure increased. Simulation and FPGA verification results show that the delay of MED block generating the critical path at the motion estimator is reduced about 19.89% than the conventional strukcture.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.1
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• pp.67-74
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• 2000

In this paper, a $54{\times}54$-bit multiplier based on a improved conditional sum adder is proposed. To reduce the multiplication time, high compression-rate compressors without Booth's Encoding, and a 108-bit conditional sum adder with separated carry generation block, are developed. Furthermore, a design technique based on pass-transistor logic is utilized for optimize the multiplication time and the power consumption by about 5% compared to that of conventional one. With $0.65{\mu}m$, single-poly, triple-metal CMOS process, its chip size is $6.60{\times}6.69\;mm^2$ and the multiplication time is 135.ns at a 3.3V power supply.

• Journal of the Korea Society of Computer and Information
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• v.11 no.2 s.40
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• pp.201-211
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• 2006

The standardization of third Generation Partnership Project(3GPP) has been performed in of order to support interactive multimedia services under mobile environments. In this 3GPP, transmit diversity solutions are applied to increase the available diversity effectively using 2 or more antennas. In this paper, we analyzer the performances on STTD(Space Time Transmit Diversity) technique and its modified techniques such as STTD-OTD, CL-STTD, and 4TX-STTD out of open loop transmit diversities that the standardization of 3GPP has released. We also propose the open loop transmitter and receiver diversities to add the receiver diversity. We analyze and discuss the performance of the proposed techniques and using the Matlab simulation under the flat fading channel environment.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.7A
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• pp.629-634
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• 2002

The next generation of wireless communication system is expected to provide users with wireless multimedia services such as high speed internet access and wireless mobile computing. Depending on the Quality of Service(QoS) requirements and different applications per user, many wireless communication systems have been proposed. The simple decoding algorithm of space-time block coding is based on the assumption of flat fading channel, where no intersymbol interference exists. In this paper, we propose to combine space-time transmit diversity with adaptive equalizer. The proposed system effectively eliminates interference caused by multipath environment. Simulation results show that the proposed system provides improved bit error rate performance.

• Journal of Energy Engineering
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• v.27 no.4
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• pp.86-91
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• 2018

This paper is a review of accounts balancing time in small distributed power trading platform using blockchain technology. First, the national VPP energy management system using the AMI applied to this study is introduced and then the accounts balancing time and process of the cryptocurrency coin payment which based on the power generation of pro-consumer certified by power big data analysis in a test bed environment is discussed. Futhermore the configuration of a power Big Data analysis system with GPU Fast Big Data that applies MapD to current lambda architecture is also introduced.

• Tribology and Lubricants
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• v.15 no.3
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• pp.265-271
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• 1999

Wherever there are rotating equipment and contact between surface, there is wear and the generation of wear particles. The particles contained in the lubricating oil carry detailed and important information about the condition monitoring of the machine. This information may be deduced from particle shape, composition, size distribution, and concentration. Therefore, This paper was undertaken to Ferrography system of wear debris generated from lubricated moving machine surface. The lubricating wear test was performed under different experimental conditions using the Falex wear test of Pin and V-Block type by Ti(C, N) coated. It was shown from the test results that wear particle concentration (WPC) and wear severity Index( $I_{S}$), size distribution in normal and abnormal wear have come out all the higher value by increases sliding friction time. Wear shape is observed on the Ferrogram it was discovered a thin leaf wear debris as well as ball and plate type wear particles. This kind of large wear shape have an important effect not only metals damage, but also seizure phenomenon.