• Title/Summary/Keyword: Bit By Bit

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A design of Software 2D BitBLT Engine based on RTOS (RTOS 기반의 소프트웨어 2D BitBLT 엔진의 설계)

  • Kim, Bong-Joo;Hong, Jiman
    • Journal of the Korea Society of Computer and Information
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    • v.19 no.4
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    • pp.35-41
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    • 2014
  • In this paper, we proposed the implementation of software-based 2D BitBLT engine on the pSOS operating system and the operation of the BitBLT engine on patient monitoring device was verified. To verify the proposed method on the patient monitoring device, we designed prototype PCB board, and verified the operation. We designed the motherboard by using ARM9-based CPU. Because hardware-based BitBLT module was replaced with software-based one, CPU load problem was weighted. To solve this problem, w changed 400Mhz processor instead of 200Mhz processor. We implemented 2D BitBLT kernel module as a device driver which is one of the key elements of a graphics controller GUI in patient monitoring device.

Design of a Wireless Self-Powered Temperature Sensor for UHF Sensor Tags (무선 전력 구동 센서 태그 내장형 온도센서의 설계)

  • Kim, Hyun-Sik;Cho, Jung-Hyun;Kim, Shi-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.10
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    • pp.1-6
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    • 2007
  • Wireless Self-Powered Temperature Sensor for UHF Sensor Tags which are basic device for construction of ubiquitous sensor network is proposed. The key parameters of the target specification are resolution of $0.1\;^{\circ}C$ per output bit, below 1.5 V of operating voltage and below 5 uW of power consumption during sensing operation. Temperature sensor circuit consists of PTAT current generator, band gap reference circuit generating both reference voltage and current, Sigma-Delta Converter, and Digital Counter. Simulated maximum resolution was $0.23\;^{\circ}C/bit$ in 11-bit output. The proposed temperature sensor was fabricated by using a 0.25 m CMOS process. The chip area is $0.32\;{\times}\;0.22\;mm$ and the operating frequency is 2 MHz. Measured resolution from fabricated temperature sensor was $4\;^{\circ}C/bit$ in 8-bit output for the temperature range from $10^{\circ}C$ to $80^{\circ}C$.

A Study on Shape Optimization of Impregnated Bit (Impregnated Bit의 형상 최적화에 관한 연구)

  • Youm, Kwang-Wook
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.22 no.6
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    • pp.60-66
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    • 2021
  • The core is extracted through drilling and used to evaluate the feasibility of developing mineral resources. To extract the core, a bit is installed in the forefront of the drilling device for drilling. Here, the drill bit receives stress due to direct friction against the ground. In addition, a bit appropriate for the given ground condition should be used due to the possibility of damaging a bit as a result of friction. This paper used a current bit model based on an impregnated bit and analyzed a new bit model that uses a stiffener of similar/disparate materials. The hardness and deflective strength were then evaluated by modeling the shape of impregnated bit through a calculation based on a theoretical formula. Through FEM analysis of the existing model and the new model, the stress and strain calculation results were optimized to minimize the stress and strain with a stress of 1.92 × 107 Pa and a strain of 9.6× 10-5 m/m.

Steganographic Model based on Low bit Encoding for VoIP (VoIP 환경을 위한 Low bit Encoding 스테가노그라픽 모델)

  • Kim, Young-Mi
    • Journal of Internet Computing and Services
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    • v.8 no.5
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    • pp.141-150
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    • 2007
  • This paper proposes new Steganographic model for VoIP that has very effective method using low bit encoding. Most of Steganographic models using Low bit Encoding have two disadvantages; one is that the existence of hidden secret message can be easily detected by auditory, the other is that the capacity of stego data is low. To solve these problems, this method embed more than one bit in inaudible range, so this method can improve the capacity of the hidden message in cover data. The embedding bit position is determined by using a pseudo random number generator which has seed with remaining message length, so it is hard to detect the stego data produced by the proposed method. This proposed model is able to use not only to communicate wave file with hidden message in VoIP environment but also to hide vary information which is user basic information, authentication system, etc.

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A Threshold Estimation Algorithm for a Noncoherent IR-UWB Receiver Using 1-bit Sampler (1-bit 샘플러를 사용한 비동기식 IR-UWB 수신기의 임계값 추정 알고리즘)

  • Lee, Soon-Woo;Park, Young-Jin;Kim, Kwan-Ho
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.44 no.8
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    • pp.17-22
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    • 2007
  • In this paper, we propose a threshold estimation algorithm for a noncoherent IR-UWB receiver using 1-bit sampler. The proposed method reduces the hardware complexity by using the information of binary data resulted from 1-bit sampler instead of measuring the energy level of a received signal. Besides, mathematical modeling shows that the performances are similar to those of theoretically optimal threshold in terms of bit error rate. Computer simulations based on the IEEE 802.15.4a channel model also demonstrate the superiority of the proposed algorithm.

A new bit line structure minimizing coupling noise for DRAM (DRAM의 비트 라인 간 커플링 노이즈를 최소화한 오픈 비트 라인구조)

  • Oh, Myung-Kyu;Jo, Kyoung-Rok;Kim, Sung-Sik
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.6
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    • pp.17-24
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    • 2004
  • This paper describes a novel bit line structure to minimize coupling noise induced by coupling capacitance between bit lines. In DRAMs coupling capacitance is inherently present bit lines. As in submicron process the bit line space gets narrower. bit line coupling capacitance increases and this increased coupling capacitance sharply raises cross-talk noise. In this paper using different layers of metal for adjacent bit lines has been tested to reduces cross-talk noise and a novel bit line structure capable of reducing capacitance is introduced and verified.

Crystal Chemistry and Dielectric Properties of $Bi_4Ti_3O_{12}$ by the Substitution of Rare Earth Elements (Y, Nd, Sm, Gd) (희토류원소(Y, Nd, Sm, Gd)의 치환에 의한 $Bi_4Ti_3O_{12}$의 결정화학 및 유전물성)

  • 고태경;방규석
    • Journal of the Korean Ceramic Society
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    • v.32 no.10
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    • pp.1178-1188
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    • 1995
  • Bi4Ti3O12 (BIT) and its rare earth (Y, Nd, Sm, Gd)-substituted derivatives were synthesized using a sol-gel method to investigate their microstructures, cystal structures and electrical properties depending on the subsituted elemetns. Nd- or Sm-substitution into BIT appeared to be favorable, while Y- or Gd-substitution occurred with a pyrochlore phase. This suggests that a smaller trivalent rare earth ion may not be favorable in the structure of BIT. The rare earth derivatives showed that their particle sizes and shapes were considerably different depending on the kinds of substituted elements. Y-substitution resulted in developing a relatively even particle size and a dense microstructure. In structure, they may be similar to the pseudo-orthorhombic BIT but close to a paraelectric tetragonal phase. Their a (or b) axes were shortened, compared to the one of BIT. Such a distortion may result a decrease in the tilting of TiO6. BIT and the derivatives showed that their dielectric constants and losses were 40~120 and less than 0.03, respectively in the frequency range of 1~10 MHz. The dielectric loss of Y-substituted derivative was the lowest one and changed a little to frequency. Curie points were observed in all the derivatives like BIT to suggest that they would be ferroelectric. The temperature stability of the delectric properties of the derivatives below the Curie points were relatively better than the one of BIT.

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Programming Characteristics of the multi-bit devices based on SONOS structure (SONOS 구조를 갖는 멀티 비트 소자의 프로그래밍 특성)

  • An, Ho-Myoung;Kim, Joo-Yeon;Seo, Kwang-Yell
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.07a
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    • pp.80-83
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    • 2003
  • In this paper, the programming characteristics of the multi-bit devices based on SONOS structure are investigated. Our devices have been fabricated by $0.35\;{\mu}m$ complementary metal-oxide-semiconductor (CMOS) process with LOCOS isolation. In order to achieve the two-bits per cell operation, charges must be locally trapped in the nitride layer above the channel near the junction. Channel hot electron (CHE) injection for programming can operate in multi-bit using localized trap in nitride film. CHE injection in our devices is achieved with the single power supply of 5 V. To demonstrate CHE injection, substrate current (Isub) and one-shot programming curve were investigated. The multi-bit operation which stores two-bit per cell is investigated with a reverse read scheme. Also, hot hole injection for fast erasing is used. Due to the ultra-thin gate dielectrics, our results show many advantages which are simpler process, better scalability and lower programming voltage compared to any other two-bit storage flash memory. This fabricated structure and programming characteristics are shown to be the most promising for the multi-bit flash memory.

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Broadband $180^{\circ}$ Bit X-band Phase Shifter Using Payallel-Coupled tines (평행 결합선로를 이용한 광대역 $180^{\circ}$ Bit X-대역 위상 변이기의 설계)

  • Sung Gyu-Je;Park Hyun-Sik;Kim Dong-Yen
    • Journal of the Microelectronics and Packaging Society
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    • v.12 no.2 s.35
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    • pp.175-179
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    • 2005
  • A novel, simple and broadband $180^{\circ}$ bit X-band phase shifter was proposed and fabricated in a standard micromachining process. It is composed of two $90^{\circ}$ parallel-coupled lines; one of which is shorted and the other is grounded. Design equations for the proposed $180^{\circ}$ bit phase shifter are derived by the method of even and odd mode analysis. Based on design equations, $180^{\circ}$ bit phase shifter was designed and fabricated to operate from 7 to 13 GHz with ${\pm}5^{\circ}$ of phase deviation.

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High Performance HIGHT Design with Extended 128-bit Data Block Length for WSN (WSN을 위한 128비트 확장된 데이터 블록을 갖는 고성능 HIGHT 설계)

  • Kim, Seong-Youl;Lee, Je-Hoon
    • Journal of Sensor Science and Technology
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    • v.24 no.2
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    • pp.124-130
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    • 2015
  • This paper presents a high performance HIGHT processor that can be applicable for CCM mode. In fact, HIGHT algorithm is a 64-bit block cipher. However, the proposed HIGHT extends the basic block length to 128-bit. The proposed HIGHT is operated as 128-bit block cipher and it can treat 128-bit block at once. Thus, it can be applicable for the various WSN applications that need fast and ultralight 128-bit block cipher, in particular, to be operated in CCM mode. In addition, the proposed HIGHT processor shares the common logics such as 128-bit key scheduler and control logics during encryption and decryption to reduce the area overhead caused by the extension of data block length. From the simulation results, the circuit area and power consumption of the proposed HIGHT are increases as 40% and 64% compared to the conventional 64-bit counterpart. However, the throughput of the proposed HIGHT can be up to two times as fast. Consequently, the proposed HIGHT is useful for USN and handheld devices based on battery as well as RFID tag the size of circuit is less than 5,000 gates.