• Proceedings of the Korean Magnestics Society Conference
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• 2011.06a
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• pp.7-8
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• 2011

Basically, the lattice mismatch between film and substrate can make those BiFeO3(BFO) films distorted with strain structure. BFO phase can be stabilized on LaAlO3(LAO) represents the example of a multiferroic with giant axial ratio. Its crystal structure is not strictly tetragonal, but tetragonal with a slight monoclinic distortion and related to the rotation of the oxygen octahedra. In this study, we show that phases with a tetragonal-like epitaxial BFO films can indeed be ferroelectric and also can be stabilized via epitaxial growth onto LAO. Recent reports on epitaxial BFO films show that the crystal structure changes from nearly rhombohedral ("R-like") to nearly tetragonal("T-like") at strains exceeding approximately -4.5%, with the "T-like" structure being characterized by a highly enhanced c/a ratio. While both the "R-like" and the "T-like" phases are monoclinic, our detailed x-ray diffraction results reveal asymmetry change from MA and MC type, respectively. By applying additional strain or by modifying the unit cell volume of the film by substituting Ba for Bi, the monoclinic distortion in the "T-like" MC phase is reduced, i.e. the system approaches a true tetragonal symmetry. There are two different M-H loops for $Bi_{1-x}Ba_xFeO_{3-{\delta}}$(BBFO) and BFO films on SrTiO3(STO) & LAO substrates. Along with the ferroelectric characterization, these magnetic data indicate that the BFO phase stabilized on LAO represents the first example of a multiferroic with giant axial ratio. However, there is a significant difference between this phase and other predicted ferroelectrics with a giant axial ratio: its crystal structure is not strictly tetragonal, but tetragonal with a slight monoclinic distortion. Therefore, in going from bulk to highly-strained films, a phase sequence of rhombohedral(R)-to-monoclinic ["R-like" MA-to-monoclinic, "T-like" MC-to-tetragonal (T)] is observed. This sequence is otherwise seen only near morphotropic phase boundaries in lead-based solid-solution perovskites (i.e. near a compositionally induced phase instability), where it can be controlled by electric field, temperature, or composition. Our results show that this evolution can occur in a lead-free, stoichiometric material and can be induced by stress alone. Those major results are summarized as follows ; 1) Ba-doping increases the unit cell volume, 2) BBFO on LAO can be fully strained up to x=0.08 as a strain limit (Fig. 1), 3) P(E) & M(H) properties can be tuned by the variation of composition, strain, and film thickness.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.11a
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• pp.73-74
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• 2006

Ferroelectric thin films have been widely investigated for future nonvolatile memory application. We fabricated the BLT ($(Bi,La)_4Ti_3O_{12}$) films on Si using a STA ($SrTa_2O_6$) buffer layer BLT and STA film were prepared by sol-gel method. Measurement data by XRD and AFM, showed that BLT film and STA films were well crystallized and a good surface morphology. From C-V measurement reward that the Au/BLT/STA/Si structure showed a clockwise hysteresis loop with a memory window of 1.5 V for the bias voltage sweep of ${\pm}5$ V. From results, the Au/BLT/STA/Si structure is useful for FeFETs.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.174-174
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• 2008

Non-volatile memories using ferroelectric-gate field-effect transistors (Fe-FETs) with a metal/ferroelectric/semiconductor gate stack (MFS-FETs) make non-destructive read operation possible. In addition, they also have features such as high switching speed, non-volatility, radiation tolerance, and high density. However, the interface reaction between ferroelectric materials and Si substrates, i.e. generation of mobile ions and short retention, make it difficult to obtain a good ferroelectric/Si interface in an MFS-FET's gate. To overcome these difficulties, Fe-FETs with a metal/ferroelectric/insulator/semiconductor gate stack (MFIS-FETs) have been proposed, where insulator as a buffer layer is inserted between ferroelectric materials and Si substrates. We prepared $SrBi_2Ta_2O_9$ (SBT) film as a ferroelectric layer and $LaZrO_x$ (LZO) film as a buffer layer on p-type (100) silicon wafer for making the MFIS-FET devices. For definition of source and drain region, phosphosilicate glass (PSG) thin film was used as a doping source of phosphorus (P). Ultimately, the n-channel ferroelectric-gate FET using the SBT/LZO/Si Structure is fabricated. To examine the ferroelectric effect of the fabricated Fe-FETs, drain current ($I_d$) versus gate voltage ($V_g$) characteristics in logarithmic scale was measured. Also, drain current ($I_d$) versus drain voltage ($V_d$) characteristics of the fabricated SBT/LZO/Si MFIS-FETs was measured according to the gate voltage variation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.236-236
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• 2008

(Bi,La)$Ti_3O_{12}$(BLT) thin film is one of the most attractive materials for ferroelectric random access memory (FRAM) applications due to its some excellent properties such as high fatigue endurance, low processing temperature, and large remanent polarization [1-2]. The authors firstly investigated and reported the damascene process of chemical mechanical polishing (CMP) for BLT thin film capacitor on behalf of plasma etching process for fabrication of FRAM [3]. CMP process could prepare the BLT capacitors with the superior process efficiency to the plasma etching process without the well-known problems such as plasma damages and sloped sidewall, which was enough to apply to the fabrication of FRAM [2]. BLT-CMP characteristics showed the typical oxide-CMP characteristics which were related in both pressure and velocity according to Preston's equation and Hernandez's power law [2-4]. Good surface roughness was also obtained for the densification of multilevel memory structure by CMP process [3]. The well prepared BLT capacitors fabricated by CMP process should have the sufficient ferroelectric properties for FRAM; therefore, in this study the electrical properties of the BLT capacitor fabricated by CMP process were analyzed with the process parameters. Especially, the effects of CMP pressure, which had mainly affected the removal rate of BLT thin films [2], on the electrical properties were investigated. In order to check the influences of the pressure in eMP process on the ferroelectric properties of BLT thin films, the electrical test of the BLT capacitors was performed. The polarization-voltage (P-V) characteristics show a decreased the remanent polarization (Pr) value when CMP process was performed with the high pressure. The shape of the hysteresis loop is close to typical loop of BLT thin films in case of the specimen after CMP process with the pressures of 4.9 kPa; however, the shape of the hysteresis loop is not saturated due to high leakage current caused by structural and/or chemical damages in case of the specimen after CMP process with the pressures of 29.4 kPa. The leakage current density obtained with positive bias is one order lower than that with negative bias in case of 29.4 kPa, which was one or two order higher than in case of 4.9 kPa. The high pressure condition was not suitable for the damascene process of BLT thin films due to the defects in electrical properties although the better efficiency of process. by higher removal rate of BLT thin films was obtained with the high pressure of 29.4 kPa in the previous study [2].