• Title/Summary/Keyword: Balanced Power

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Two Switches Balanced Buck Converter for Common-Mode Noise Reduction

  • Kanjanasopa, Warong;Prempraneerach, Yothin
    • 제어로봇시스템학회:학술대회논문집
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    • 2004.08a
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    • pp.493-498
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    • 2004
  • The EMI noise source in a switching mode power supply is dominated by a common mode noise. If we can understand the common mode noise occurring mechanism, it is resulted to find out the method to suppress the EMI noise source in the switching mode power supply. The common mode noise is occurring mostly due to circuit is unbalanced which is caused by the capacitive coupling to frame ground, which passes through a heatsink of the switching devices. This research paper presents a new effective balancing method of buck converter circuit by mean of grounding the parasitic and compensation capacitors in correct proportion which is called that the common mode impedance balance (CMIB). The CMIB can be achieved by source, transmission line and termination balanced, such balancing, the common mode current will be cancelled out in the frame ground. The greatly reduced common mode noise can be confirmed by the experimental results.

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A GaAs MMIC Single-Balanced Upconverting Mixer With Built-in Active Balun for PCS Applications (PCS 용 MMIC Single-blanced upconverting 주파수 혼합기 설계 및 제작)

  • 강현일;이원상;정기웅;오재응
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.35D no.4
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    • pp.1-8
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    • 1998
  • An MMIC single-balanced upconverting mixer for PCS application has been successfully developed using an MMIC process employed by 1 .mu. ion implanted GaAs MESFET and passive lumped elements consisting of spiral inductor, Si3N4 MIM capacitors and NiCr resistors. The configuration of the mixer presented in this paper is two balanced cascode FET mixers with common-source self-bias circuits for single power supply operation. The dimension of the fabricated circuit including two active baluns intermodulation characteristic with two-tone excitation are also measured, showing -28.17 dBc at IF power of -30 dBm.

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Power Comparison in a Balanced Factorial Design with a Nested Factor

  • Choi, Young-Hun
    • Journal of the Korean Data and Information Science Society
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    • v.19 no.4
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    • pp.1059-1071
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    • 2008
  • In a balanced factorial design with a nested factor where crossed factors as well as a nested factor exist simultaneously, powers of the rank transformed FR statistic for testing the main, nested and interaction effects are superior to those of the parametric F statistic. In heavy tailed distributions such as exponential and double exponential distributions, powers of the FR statistic show much higher level than those of the F statistic. Further powers of the F and FR statistic for testing the main effect show the highest level in an absolute size as compared with powers of the F and FR statistic for testing the nested and interaction effects. However powers of the FR statistic for testing the nested and interaction effects rather than the main effect are greater in a relative size than powers of F statistic for the all population distributions.

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DC-Link Capacitor Voltage Balanced Modulation Strategy Based on Three-Level Neutral-Point-Clamped Cascaded Rectifiers

  • Han, Pengcheng;He, Xiaoqiong;Zhao, Zhiqin;Yu, Haolun;Wang, Yi;Peng, Xu;Shu, Zeliang
    • Journal of Power Electronics
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    • v.19 no.1
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    • pp.99-107
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    • 2019
  • This study proposes a new modulation strategy to deal with unbalanced output voltage that is based on three-level neutral-point-clamped cascaded rectifiers. The fundament idea is to reallocate the value of the voltage levels generated by each of the modules on the basis of space vector pulse width modulation. This proposed modulation strategy can reduce the switching frequency while maintaining the mutual-module voltage balance. First, an analysis of unbalanced output voltage is reflected. Then a new modulation strategy is introduced in detail. Internal module capacitor voltages are balanced by the selection of redundant vectors. Moreover, the voltage balance ability is calculated. Finally, the feasibility of this modulation strategy is verified through experimental results.

A Design and Implementation of High Power Amplifier for ISM-band (ISM 대역용 고출력 전력증폭기의 설계 몇 구현)

  • Choi, Seong-Keon;Park, Jun-Seok;Lee, Moon-Que;Cheon, Chang-Yul
    • Proceedings of the Korea Electromagnetic Engineering Society Conference
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    • 2003.11a
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    • pp.326-329
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    • 2003
  • In this paper, we designed and implemented a high power amplifier(HPA) to achieve the high Power Added Efficiency(PAE) over 40% at the 90W output power for the ISM-band(fo=2.45GHz). HPA presented in this paper has 3-stage drive amplifier and 1-stage final amplifier. In the final amplifier, we utilized balanced amplifier configuration with GaAs FET and each of two amplifiers has the push-pull configuration to increase PAE. From the measurement results, we obtained PAE of 42.95% at the 90.57W output power.

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A Study on the Parallel Operation Control Technique of On-line UPS System (무정전전원장치의 병렬운전 제어기법에 관한 연구)

  • 곽철훈;최규하
    • The Transactions of the Korean Institute of Power Electronics
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    • v.8 no.6
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    • pp.585-592
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    • 2003
  • The parallel operation system of UPS is used to increase reliability of power source at critical load. But parallel UPS system has a few defects, impedance is different from each other and circulating current occurs between UPSs, due to line impedance and parameter variation, though controlled by the same synchronization signal. According to such characteristic of parallel UPS, balanced load-sharing control is the most important technique in parallel UPS operation. In this paper, a novel power deviation compensation algorithm is proposed. it is composed of voltage controller to compensate power deviation that be calculated by using active and reactive current deviation between Inverters on synchronous d-q reference frame.

Development of Regional Balanced Index for Administrative Districts and Dongs in Seoul using Factor Analysis (요인분석을 활용한 서울시 자치구/행정동의 지역균형지수 개발)

  • Kim, Dong-geun;Park, Kwiwon;Ha, Somi;Kim, Dohyun
    • Journal of Korean Society for Quality Management
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    • v.49 no.3
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    • pp.375-392
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    • 2021
  • Purpose: Regional gaps and conflicts between regions due to Korea's economic development and industrialization have become important issues, and the issue of balanced regional development at regional level has been discussed as the size of the region has increased recently. Although evaluation of regional balance was attempted through various regional balanced development indexes, it is inappropriate as a standard for determining regional balance in Seoul. Therefore, this study aims to develop objective evaluation methodologies and evaluation indicators for balanced development of administrative districts in Seoul, not existing city and national units. Methods: We looked at existing regional balanced development indexes, and suggested a new regional balanced index reflecting regional development, backwardness, and spatial characteristics in Seoul using factor analysis. Results: As a result of factor analysis, the regional balanced development index for administrative districts and administrative dongs consists of two factors (regional revitalization, financial power) and three factors (commercial density, social security demand, regional retardness), respectively. Then the regional balanced development index scores for 116 administrative districts and 423 administrative dongs are calculated by multiplying each factor by a weight obtained through experts' survey. Conclusion: The proposed regional balanced development index can be used as an objective and quantitative basis for regional balanced development within a city. Further research may include continuously adding new indicators that reflect the direction and scale of development.

New Fault Location Algorithms by Direct Analysis of Three-Phase Circuit Using Matrix Inverse Lemma for Unbalanced Distribution Power Systems

  • Park, Myeon-Song;Lee, Seung-Jae
    • KIEE International Transactions on Power Engineering
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    • v.3A no.2
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    • pp.79-84
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    • 2003
  • Unbalanced systems, such as distribution systems, have difficulties in fault locations due to single-phase laterals and loads. This paper proposes new fault locations developed by the direct three-phase circuit analysis algorithms using matrix inverse lemma for the line-to-ground fault case and the line-to-line fault case in unbalanced systems. The fault location for balanced systems has been studied using the current distribution factor, by a conventional symmetrical transformation, but that for unbalanced systems has not been investigated due to their high complexity. The proposed algorithms overcome the limit of the conventional algorithm using the conventional symmetrical transformation, which requires the balanced system and are applicable to any power system but are particularly useful for unbalanced distribution systems. Their effectiveness has been proven through many EMTP simulations.

Analysis on Reduction Method of Symmetrical Fault Current in a Power System with a SFCL applied into Neutral Line (전력계통의 중성선에 적용된 초전도한류기의 대칭고장전류 저감방안 분석)

  • Lim, Sung-Hun
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.23 no.2
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    • pp.148-152
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    • 2010
  • The superconducting fault current limiter (SFCL) applied into the neural line of a power system, which can limit the unsymmetrical fault current from the single-line ground fault or the double-line ground fault, was reported to be the effective application location of the SFCL in a power system. However, the limiting operation for the symmetrical fault current like the triple line-ground fault is not effective because of properties of the balanced three-phase system. In this paper, the limiting method of the symmetrical fault current in a power system with a SFCL applied into neutral line was suggested. Through the short-circuit experiments of the three-phase fault types for the suggested method, the fault current limiting and recovery characteristics of the SFCL in the neutral line were analyzed and the effectiveness of the suggested method was described.

Voltage Control of Stand-Alone Inverter for Power Quality Improvement Under Unbalanced and Non-linear Load (불평형 및 비선형부하 시 전력품질 향상을 위한 독립형 인버터의 전압제어 기법)

  • Lee, Wujong;Jo, Jongmin;Cha, Hanju
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.65 no.4
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    • pp.567-575
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    • 2016
  • This paper proposed the voltage control of stand-alone inverter for power quality improvement under unbalanced and non-linear load. The 3-phase DC-AC inverter controls CVCF(Constant Voltage Constant Frequency) and selective harmonic eliminate method in stand-alone mode by PR controller, and the stand-lone inverter supplies stable sinusoidal voltage to balanced, unbalanced and non-linear loads. The total harmonic distortion(THD) of line-to-line load voltage($V_{LL}$) is 1.2% in the balanced load. THD of $V_{LL}$ is reduced from 5.2% to 1.4% and 6.7% to 3.5%, respectively unbalanced and non-linear load. The stand-alone inverter can be supplies sinusoidal balanced voltage to unbalanced load because the voltage unbalanced factor(VUF) of $V_{LL}$ is reduced from 5.2% to 1.4% in the unbalanced load. Feasibility of control method for a stand-alone inverter will be verified through 30kW stand-alone inverter system.