• Title/Summary/Keyword: BUS

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Productivity Changes by Public Transport Reforms in the Seoul's Urban Bus Industry (서울의 대중교통체계 개편에 따른 시내버스업체의 생산성 변화)

  • Oh, Mi-Young;Kim, Sung-Soo
    • Journal of Korean Society of Transportation
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    • v.23 no.7 s.85
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    • pp.53-61
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    • 2005
  • The Seoul City Government recently reformed the entire public transport system in an effort to prevent further deterioration in urban bus system's performance and service level. To analyze into impact on the productivity of Seoul's urban bus firms, this paper measures firm-level technical efficiency and productivity change with data envelopment analysis and Malmquist index approach. The paper then conceptualizes that these forms produce three kinds of output (bus-kilometers, passengers, or bus-kilometers and passengers) using five inputs (driver, maintenance, management, vehicle and fuel). The findings show that most (over one half) firms experienced a decline (an improvement) in productivity in the case of specifying only bus-kilometers (passengers) as output. As a result, it is discovered that an average firm had no change in productivity in the case of combining bus-kilometers and passengers as output. This is because the efficiency of an average firm declined due to increase in employees per bus and to an decrease in kilometers per bus. while its effectiveness improved due to an increase in passengers per bus which was caused by an increase in routes and a change in fare structure.

SOC Bus Transaction Verification Using AMBA Protocol Checker

  • Lee, Kab-Joo;Kim, Si-Hyun;Hwang, Hyo-Seon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.2 no.2
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    • pp.132-140
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    • 2002
  • This paper presents an ARM-based SOC bus transaction verification IP and the usage experiences in SOC designs. The verification IP is an AMBA AHB protocol checker, which captures legal AHB transactions in FSM-style signal sequence checking routines. This checker can be considered as a reusable verification IP since it does not change unless the bus protocol changes. Our AHB protocol checker is designed to be scalable to any number of AHB masters and reusable for various AMBA-based SOC designs. The keys to the scalability and the reusability are Object-Oriented Programming (OOP), virtual port, and bind operation. This paper describes how OOP, virtual port, and bind features are used to implement AHB protocol checker. Using the AHB protocol checker, an AHB simulation monitor is constructed. The monitor checks the legal bus arbitration and detects the first cycle of an AHB transaction. Then it calls AHB protocol checker to check the expected AHB signal sequences. We integrate the AHB bus monitor into Verilog simulation environment to replace time-consuming visual waveform inspection, and it allows us to find design bugs quickly. This paper also discusses AMBA AHB bus transaction coverage metrics and AHB transaction coverage analysis. Test programs for five AHB masters of an SOC, four channel DMAs and a host interface unit are executed and transaction coverage for DMA verification is collected during simulation. These coverage results can be used to determine the weak point of test programs in terms of the number of bus transactions occurred and guide to improve the quality of the test programs. Also, the coverage results can be used to obtain bus utilization statistics since the bus cycles occupied by each AHB master can be obtained.

SAMBA Type MPSoC Bus Architecture Optimization under Performance Constraints (성능 제약 조건 하에서의 SAMBA 형 MPSoC 버스 구조 최적화)

  • Kim, Hong-Yeom;Jung, Sung-Chul;Shin, Hyun-Chul
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.1
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    • pp.94-101
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    • 2010
  • Optimization of interconnects among processors and memories becomes important as multiple processors and memories can be integrated on a Multi-Processor System-on-Chip (MPSoC). Since the optimal interconnection architecture is usually dependent on the applications, systematic design methodology for various data transfer requirements is necessary. In this paper, we focus on bus interconnection for MPSoC applications which use 4 ~ 16 processors. We propose a new systematic bus design methodology under performance constraints using Single Arbitration Multiple Bus Accesses (SAMBA) style bus architectures. Optimized bus architecture is found to satisfy performance constraints for a single or multiple applications. When compared to the unoptimized architecture, our method can reduce the bus switch logic circuits significantly (by more than 50% sometimes). Furthermore, low cost bus architectures can be found to satisfy the performance constraints for multiple applications.

A New Low-Power Bus Encoding Scheme Using Bus-Invert Logic Conversion (Bus-Invert 로직변환을 이용한 새로운 저전력 버스 인코딩 기법)

  • Lee, Youn-Jin;Shidi, Qu;Kim, Young-Chul
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.36 no.12B
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    • pp.1548-1555
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    • 2011
  • In ultra-deep submicron technology, minimization of propagation delay and power consumption on buses is one of the most important design objectives in system-on-chip (SOC) design. Crosstalk between adjacent wires on the bus may create a significant portion of propagation delay. Elimination or minimization of such faults is crucial to the performance and reliability of SOC designs. Most of the previous works on bus encoding are targeted either to minimize the bus switching or minimize the crosstalk delay, but not both. This paper proposes a new bus encoding scheme which can adaptively select one of functions "invert" and "logic-convert" according the number of bus switching on an encoded 4-bit cluster. This scheme leads to minimization of both crosstalk and bus switching. In experiment result, our proposed encoding technique consumes about 25% less power over the previous, while completely eliminating the crosstalk delay.

Run-Time Hardware Trojans Detection Using On-Chip Bus for System-on-Chip Design (온칩버스를 이용한 런타임 하드웨어 트로이 목마 검출 SoC 설계)

  • Kanda, Guard;Park, Seungyong;Ryoo, Kwangki
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.2
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    • pp.343-350
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    • 2016
  • A secure and effective on-chip bus for detecting and preventing malicious attacks by infected IPs is presented in this paper. Most system inter-connects (on-chip bus) are vulnerable to hardware Trojan (Malware) attack because all data and control signals are routed. A proposed secure bus with modifications in arbitration, address decoding, and wrapping for bus master and slaves is designed using the Advanced High-Performance and Advance Peripheral Bus (AHB and APB Bus). It is implemented with the concept that arbiter checks share of masters and manage infected masters and slaves in every transaction. The proposed hardware is designed with the Xilinx 14.7 ISE and verified using the HBE-SoC-IPD test board equipped with Virtex4 XC4VLX80 FPGA device. The design has a total gate count of 39K at an operating frequency of 313MHz using the $0.13{\mu}m$ TSMC process.

Computer Vision-based Method of detecting a Approaching Vehicle or the Safety of a Bus Passenger Getting off (버스 승객의 안전한 하차를 위한 컴퓨터비전 기반의 차량 탐지 시스템 개발)

  • Lee Kwang-Soon;Lee Kyung-Bok;Rho Kwang-Hyun;Han Min-Hong
    • Journal of the Institute of Convergence Signal Processing
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    • v.6 no.1
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    • pp.1-7
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    • 2005
  • This paper describes the system for detecting vehicles in the rear and rear-side that access between sidewalk and bus stopped to city road at day by computer vision-based method. This system informs appearance of vehicles to bus driver and passenger for the safety of a bus passenger getting off. The camera mounted on the top portion of the bus exit door gets the rear and rear-side image of the bus whenever a bus stops at the stop. The system sets search area between bus and sidewalk from this image and detects a vehicle by using change of image and sobel filtering in this area. From a central point of the vehicle detected, we can find out the distance, speed and direction by its location, width and length. It alarms the driver and passengers when it's judged that dangerous situation for the passenger getting off happens. This experiment results in a detection rate more than 87% in driving by bus on the road.

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Design of Safety School Bus System Using RFID (RFID를 활용한 안전 스쿨버스 시스템 설계)

  • Kim, Ji-Yeon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.26 no.11
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    • pp.1741-1746
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    • 2022
  • As the use of school buses becomes more common, related laws are being enacted, such as making it mandatory for children to check school bus dropouts due to frequent accidents caused by the negligence of school bus drivers and their guardians. In this paper, we propose a safe school bus system that links efficient radio-frequency identification (RFID) and mobile APP in terms of energy utilization and cost. The school bus system uses RFID cards to check information on children boarding the school bus, and real-time SMS transmission allows parents to safely send their children to and from school. Instructors on the school bus can check their children's disembarkation information once more through APP, preventing various accidents that may occur to children left on the bus. Due to the automation of the school bus operation log, daycare center teachers can not only check the information on getting on and off, but also manage the information on the attendance and discharge of the students.

A Study on the Application of Bus Route Sketch Methodology Based on Multiple Evaluation Indicators: Focusing on a Bus Line in Sejong (다중 평가지표 기반의 버스노선 스케치 방법론 적용 연구: 세종시 버스노선 사례를 중심으로)

  • Jun-Yong Jang;Sung Hoo Kim
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.23 no.2
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    • pp.50-68
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    • 2024
  • This study developed a bus route sketch (BRS) methodology for utilizing bus route design and operation steps in practice and evaluated the feasibility of the method. The BRS methodology consists of three steps: transportation zoning suitable for the provider and users of bus transit service; determining the bus operation route based on established transportation zones and path combination; optimizing the operation route based on the estimation of route alternatives in terms of the multi-performance measures from the standpoints of bus-transit service provider and user. The results of a case study showed that the estimation scores from the perspectives of provider and user were improved significantly from 8.83 and 7.13 to 9.50 and 9.89, respectively. Because the BRS method was designated and developed to be suitable for field application for route planning and operation, the method can be used instantly and directly to estimate and adjust the on-operation bus transit line and route design.

Mitigation of Insufficient Capacity Problems of Central Bus Stops by Controlling Effective Green Time (유효녹색시간 조정을 활용한 중앙버스정류장 용량 부족 완화 방안 연구)

  • Koo, Kyo Min;Lee, Jae Duk;Ahn, Se Young;Chang, Iljoon
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.21 no.1
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    • pp.35-50
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    • 2022
  • After the introduction of the central bus lane system, bus traffic was prioritized. This resulted in improved trust from bus users. However, the low capacity at the central bus stop reduces traffic speed and punctuality. In addition, physical constraints are inevitable because the construction of central bus lanes and bus stops considers the city's road geometry. Therefore, this study attempted to optimize the effective green time of the traffic signal system at the entrance and exit of the central bus stop to remedy its insufficient operational capacity. The Transit Capacity and Quality of Service Manual and Korea Highway Capacity Manual were used as the analysis methodologies. The number of stop areas for central bus stops to be built was determined by excluding variable physical factors, and field survey data collected from nine randomly selected central bus stops currently installed in Seoul were used. A scenario analysis was conducted on the central bus stops with insufficient capacity by adjusting the effective green time, and the capacity of the central bus stop was set as the dependent variable. According to the results, 26.7 percent of the central bus stops with insufficient capacity can solve the problem of insufficient capacity. Therefore, the results of this study can be verified by improving the operation level, and it can be effective even if the number of central bus stops calculated by engineering is not guaranteed during the planning stage of the central bus stop. As the number of central bus stops is expected to increase further as the number of central bus stops increases, it is necessary to improve the number of central bus stops. Therefore, it is hoped that the results presented in this study will be used as basic data for the improvement plan at the operational level before introducing the physical improvement plan.

Factors Influencing Crash Severity by the Types of Bus Transportation Services Using Ordered Probit Models (순서형 프로빗 모형을 이용한 버스 운송사업 유형 별 사고심각도 영향요인 분석)

  • YOON, Sangwon;KHO, Seung-Young;KIM, Dong-Kyu
    • Journal of Korean Society of Transportation
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    • v.36 no.1
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    • pp.13-22
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    • 2018
  • Buses, one of the representative public transportation modes, are divided into a vareity of service types according to the purpose of operation, operating distance, and management agencies. Although bus-involved crashes may cause large amount of damage due to the higher number of passengers boarded on a bus, prior research has little focused on crash severity according to bus service types. This study aims to investigate factors influencing crash severity in bus-involved crashes and to present policy implications to reduce crash severity by bus service type. To do this, bus-involved crash data from the Traffic Accident Analysis System (TAAS) during five-year period are used. Ordered probit models for three types of bus service, i.e., city bus, suburban and express buses, and charter buses, are estimated to analyze the factors of accident severity. The results show that there are significant differences of factors affecting crash severity among the types of bus services while speed and road surface influence all the types of buses. In case of local buses, time of day, roadway alignment, and installation of a traffic signal are found to be statistically significant factors. Seat belt and road class have significant effects on injury severity of the intercity and express buses. Chartered buses have time of day, driving experience, seatbelt, traffic signal, and day of week as the significant factors. The results of this study are expected to contribute to the reduction of the crash severity by each bus service type.