• 제목/요약/키워드: BGA(Ball Grid Array) Socket

검색결과 5건 처리시간 0.019초

LIGA 공정을 이용한 Cu전극의 방전가공 특성 분석 (The analysis of EDM characteristics for Cu-electrode using LIGA process)

  • 이상훈;정태성;장석상;김종현
    • 한국소성가공학회:학술대회논문집
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    • 한국소성가공학회 2007년도 춘계학술대회 논문집
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    • pp.383-386
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    • 2007
  • In this study, the analysis was carried out for Electrical Discharge Machining (EDM) characteristics of the Cu electrodes by LIGA process. The shape of electrodes has 324 pins for the cavity of BGA(Ball Grid Array) type test socket mold. BGA test sockets are used in the inspection process of the semi-conductor I.C chip manufacturing. In the work, the machining performance for EDM of the electrodes was analyzed on dimensional accuracy and wear rate. The dimensional accuracy was measured for dimension of the pins, pitch size between the pins and the roundness of corner edge using optical measuring machine.

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BeCu 금속박판을 이용한 테스트 소켓 제작 (Fabrication of Test Socket from BeCu Metal Sheet)

  • 김봉환
    • 센서학회지
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    • 제21권1호
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    • pp.34-38
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    • 2012
  • We have developed a cost effective test socket for ball grid array(BGA) integrated circuit(IC) packages using BeCu metal sheet as a test probe. The BeCu furnishes the best combination of electrical conductivity and corrosion resistance. The probe of the test socket was designed with a BeCu cantilever. The cantilever was designed with a length of 450 ${\mu}m$, a width of 200 ${\mu}m$, a thickness of 10 ${\mu}m$, and a pitch of 650 ${\mu}m$ for $11{\times}11$ BGA. The fabrication of the test socket used techniques such as through-silicon-via filling, bonding silicon wafer and BeCu metal sheet with dry film resist(DFR). The test socket is applicable for BGA IC chip.

Experimental investigation of Scalability of DDR DRAM packages

  • Crisp, R.
    • 마이크로전자및패키징학회지
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    • 제17권4호
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    • pp.73-76
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    • 2010
  • A two-facet approach was used to investigate the parametric performance of functional high-speed DDR3 (Double Data Rate) DRAM (Dynamic Random Access Memory) die placed in different types of BGA (Ball Grid Array) packages: wire-bonded BGA (FBGA, Fine Ball Grid Array), flip-chip (FCBGA) and lead-bonded $microBGA^{(R)}$. In the first section, packaged live DDR3 die were tested using automatic test equipment using high-resolution shmoo plots. It was found that the best timing and voltage margin was obtained using the lead-bonded microBGA, followed by the wire-bonded FBGA with the FCBGA exhibiting the worst performance of the three types tested. In particular the flip-chip packaged devices exhibited reduced operating voltage margin. In the second part of this work a test system was designed and constructed to mimic the electrical environment of the data bus in a PC's CPU-Memory subsystem that used a single DIMM (Dual In Line Memory Module) socket in point-to-point and point-to-two-point configurations. The emulation system was used to examine signal integrity for system-level operation at speeds in excess of 6 Gb/pin/sec in order to assess the frequency extensibility of the signal-carrying path of the microBGA considered for future high-speed DRAM packaging. The analyzed signal path was driven from either end of the data bus by a GaAs laser driver capable of operation beyond 10 GHz. Eye diagrams were measured using a high speed sampling oscilloscope with a pulse generator providing a pseudo-random bit sequence stimulus for the laser drivers. The memory controller was emulated using a circuit implemented on a BGA interposer employing the laser driver while the active DRAM was modeled using the same type of laser driver mounted to the DIMM module. A custom silicon loading die was designed and fabricated and placed into the microBGA packages that were attached to an instrumented DIMM module. It was found that 6.6 Gb/sec/pin operation appears feasible in both point to point and point to two point configurations when the input capacitance is limited to 2pF.

MEMS 공정을 이용한 BGA IC 패키지용 테스트 소켓의 제작 (Fabrication of MEMS Test Socket for BGA IC Packages)

  • 김상원;조찬섭;남재우;김봉환;이종현
    • 대한전자공학회논문지SD
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    • 제47권11호
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    • pp.1-5
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    • 2010
  • 본 논문에서는 외팔보 배열 구조를 가지는 MEMS 테스트 소켓을 SOI 웨이퍼를 이용하여 개발하였다. 외팔보는 연결부분의 기계적 취약점을 보완하기 위해 모서리가 둥근 형태를 가지고 있다. 측정에 사용 된 BGA IC 패키지는 볼 수 121개, 피치가 $650{\mu}m$, 볼 직경 $300{\mu}m$, 높이 $200{\mu}m$ 을 가지고 있다. 제작된 외팔보는 길이 $350{\mu}m$, 최대 폭 $200{\mu}m$, 최소 폭 $100{\mu}m$, 두께가 $10{\mu}m$인 곡선 형태의 외팔보이다. MEMS 테스트 소켓은 lift-off 기술과 Deep RIE 기술 등의 미세전기기계시스템(MEMS) 기술로 제작되었다. MEMS 테스트 소켓은 간단한 구조와 낮은 제작비, 미세 피치, 높은 핀 수와 빠른 프로토타입을 제작할 수 있다는 장점이 있다. MEMS 테스트의 특성을 평가하기 위해 deflection에 따른 접촉힘과 금속과 팁 사이의 저항과 접촉저항을 측정하였다. 제작된 외팔보는 $90{\mu}m$ deflection에 1.3 gf의 접촉힘을 나타내었다. 신호경로저항은 $17{\Omega}$ 이하였고 접촉저항은 평균 $0.73{\Omega}$ 정도였다. 제작된 테스트 소켓은 향 후 BGA IC 패키지 테스트에 적용 가능 할 것이다.

고경도 금형강의 와이어 방전가공특성에 관한 연구 (A Study on the Characteristics of Wire Electrical Discharge Machining of the High-Hardened Mold Steel)

  • 이상훈;정태성
    • 소성∙가공
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    • 제15권9호
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    • pp.648-653
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    • 2006
  • In this study, the characteristics of Wire Electrical Discharge Machining(WEDM) of the high-hardened mold steel were investigated. WEDM experiments have been carried out based on parameter of wire diameter, pulse on time, pulse off time, feed rate and cycle etc. From the results, the optimized WEDM cycle of RIGOR steel has been revealed as $5{\sim}7$ times. Also, geometrical accuracy of the Core Pin is dependent on WEDM wire radius machining condition and wire chattering.