• 한국정보통신학회논문지
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• 제6권1호
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• pp.25-29
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• 2002

High speed 신호처리는 통신분야, SC circuit, HDTV, ISDN 등에서 관심이 더욱 승가하고 있으며, high speed 신호처리를 위한 많은 방법들이 있다. 본 논문에서는 CMOS 공정에서 고주파 Op-amp의 실현을 의한 설계를 기술하였다. 아날로그 집적회로를 기초로 하는 high speed op-amp의 기능을 제한하는 요소 중 한가지는 유효 주파수 범위이다. 본 논문에서는 $C_{L}$ =2pF에서 단위이득 주파수가 170MHz인 향상된 대역폭적을 가지는 CMOS op-amp 구조를 계발한다. 공정은 1.2$\mu$디자인 룰을 따른다. 본 논문에서 제시한 CMOS op-amp 고주파 SC filter에서 요구하는 큰 커패시터 부하에서의 넓고 안정된 대역폭을 얻기에 매우 적합하다.

• 융합신호처리학회논문지
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• 제10권4호
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• pp.289-293
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• 2009

This study proposes a novel double-base log encoder (DBLE) for flash Analog-to-Digital converters (ADCs). Analog inputs of flash ADCs are represented in logarithmic number systems with bases of 2 and 3 at the outputs of DBLE. A look up table stores the sets of exponents of base 2 and 3 values. This algorithm improves the performance of a DSP (Digital Signal Processor) system that takes outputs of a flash ADC, since the double-base log number representation does multiplication operation easily within negligible error range in ADC. We have designed and implemented 6 bits DBLE implemented with ROM (Read-Only Memory) architecture in a $0.18\;{\mu}m$ CMOS technology. The power consumption and speed of DBLE are better than the FAT tree and binary ROM encoders at the cost of more chip area. The DBLE can be implemented into SoC architecture with DSP to improve the processing speed.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.1055-1058
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• 2005

The present paper designed a weight measuring instrumentation system in which data conversion and a series of signal processing were totally equipped. 16 loadcell are incoming sensors and each output of the loadcell was amplified and filtered for proper analog signal processing. Several measuring instrumentation OP amps and general purposed OP amps were used. 12 bits A/D converters converted analog signals to digital bits and a PIC microprocessor controlled the 16 channels of loadcell. RF RS232 modules were used for wireless communication between the PIC microprocessor and an ethernet host for a remote sensor monitoring system development.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 학술대회 논문집 정보 및 제어부문
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• pp.70-72
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• 2005

The present paper designed a weight measuring instrumentation system in which data conversion and a series of signal processing were totally equipped. 16 loadcell are incoming sensors and each output of the loadcell was amplified and filtered for proper analog signal processing. Several measuring instrumentation OP amps and general purposed OP amps were used. 12 bits AID converters converted analog signals to digital bits and a PIC microprocessor controlled the 16 channels of loadcell. RF RS232 modules were used for wireless communication between the PIC microprocessor and an ethernet host for a remote sensor monitoring system development.

• Journal of information and communication convergence engineering
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• 제9권1호
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• pp.74-77
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• 2011

PSPICE modeling of a commercial LED driver IC (TOP245P) and PC817A optocoupler is proposed for the switch-mode power supply (SMPS) (applicable to LED driver) design and simulation. An analog behavioral model of the TOP245P IC including the shunt regulator, under-voltage(UV) detection, over-voltage(OV) shut-down and SR flip-flop is developed by using PSPICE. The empirical equation of PC817A current transfer ratio (CTR) is fitted from the datasheet of PC817A. Two types of SMPSs are simulated with the averaged-model and switching-model. The simulation results by the proposed PSPICE models are in good agreement with those in the data sheet and an experimental data.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 추계종합학술대회 논문집
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• pp.391-394
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• 1998

Telecommunication system demands for increased bandwidths and operating frequencies for analog signal processing could be satisfied in the near future by the emergence of a novel technology based on magnetostatic waves propagating in low loss ferrimagnetic films. The magnetostatic wave n the only available technology for analog signal processing directly at microwave frequencies.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.289-289
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• 2010

Translation Characteristics of Digital Decoder utilizing the analog parallel processing circuit technology is designed. The fast parallel viterbi decoder system acted by a replacement of the conventional digital viterbi Decoder has good propagation. we are applied proposed analog viterbi decoder to decode PR signal for DVD and analyze the specific circuit and signal characteristics.

• 대한의용생체공학회:의공학회지
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• 제22권3호
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• pp.285-291
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• 2001

In this paper, we designed two preprocessing adaptive filter - high pass filter and notch filter - using FPGA. For minimizing the calculation load of multi-channel and high-resolution ECG system, we utilize FPGA rather than digital signal processing chip. To implement the designed filters in FPGA, we utilize FPGA design tool(Altera corporation, MAX-PLUS II) and CSE database as test data. In order to evaluate the performance in terms of processing time, we compared the designed filters with the digital filters implemented by ADSP21061(Analog Devices). As a result, the filters implemented by FPGA showed better performance than the filters based on ADSP21061. As a consequence of examination, we conclude that FPGA is a useful solution in multi-channel and high-resolution signal processing.

• 센서학회지
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• 제16권3호
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• pp.187-191
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• 2007

This paper presents a development of the multi-channel data acquisition/logging system for a sensor signal processing and a method of the evaluation and a temperature compensation for the A/D converters with the specific analog and digital circuit including the software. Also, we have designed a hardware and a software filters with smart algorithm for better signal processing of the proposed system. Software approach was adopted to obtain the stable data from A/D converter.

• 융합신호처리학회 학술대회논문집
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• 한국신호처리시스템학회 2001년도 하계 학술대회 논문집(KISPS SUMMER CONFERENCE 2001
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• pp.89-92
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• 2001

본 논문에서는 프로그램-가능한(programmable) 소프트웨어 무선(software radio)$^{[1]}$ 디지털 통신을 위한 연구로, ASK(Amplitude Shift Keying), FSK(frequency Shift Keying), 그리고 PSK (Phase Shift Keying) 변조$^{[2]-[4]}$를 DSP(Digital Signal Processor)를 사용하여 프로그램-가능한 소프트웨어(알고리즘)로 구현하였다. 세개 의 서로 다른 변조 방식들, ASK, FSK, 그리고 PSK를 하나의 DSP에 구현하여 선택적 변조가 가능하도록 하였다. 사용된 DSP는 모토롤라(Motorola) 사의, 24-비트, 40 MHz에서 20 MIPS(Million Instruction per Second)로 동작하는 DSP56002$^{[5]-[6]}$이고, A/D (Analog to Digital) 와 D/A(Digital to Analog) 변환기는 크리스털(Crystal)사의 16-비트 그리고 최대 샘플링(sampling) 주파수 50 kHz인 CS4215 코덱 칩(codec chip)$^{[8]}$ 이 사용되었다.