• Title/Summary/Keyword: Analog electronics

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Duty Cycle-Corrected Analog Synchronous Mirror Delay for High-Speed DRAM (고속 DRAM을 위한 Duty Cycle 보정 기능을 가진 Analog Synchronous Mirror Delay 회로의 설계)

  • Choi Hoon;Kim Joo-Seong;Jang Seong-Jin;Lee Jae-Goo;Jun Young-Hyun;Kong Bai-Sun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.9 s.339
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    • pp.29-34
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    • 2005
  • This paper describes a novel internal clock generator, called duty cycle-corrected analog synchronous mirror delay (DCC-ASMD). The proposed circuit is well suited for dual edge-triggered systems such as double data-rate synchronous DRAM since it can achieve clock synchronization within two clock cycles with accurate duty cycle correction. To evaluate the performance of the proposed circuit, DCC-ASMD was designed using a $0.35\mu$m CMOS process technology. Simulation results show that the proposed circuit generates an internal clock having $50\%$ duty ratio within two clock cycles from the external clock having duty ratio range of $40\;\~\;60$.

Signal Compensation for Analog Rotor Position Errors due to Nonideal Sinusoidal Encoder Signals

  • Hwang, Seon-Hwan;Kim, Dong-Youn;Kim, Jang-Mok;Jang, Do-Hyun
    • Journal of Power Electronics
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    • v.14 no.1
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    • pp.82-91
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    • 2014
  • This paper proposes a compensation algorithm for the analog rotor position errors caused by nonideal sinusoidal encoder output signals including offset and gain errors. In order to achieve a much higher resolution, position sensors such as resolvers or incremental encoders can be replaced by sinusoidal encoders. In practice, however, the periodic ripples related to the analog rotor position are generated by the offset and gain errors between the sine and cosine output signals of sinusoidal encoders. In this paper, the effects of offset and gain errors are easily analyzed by applying the concept of a rotating coordinate system based on the dq transformation method. The synchronous d-axis signal component is used directly to detect the amplitude of the offset and gain errors for the proposed compensator. As a result, the offset and gain errors can be well corrected by three integrators located on the synchronous d-axis component. In addition, the proposed algorithm does not require any additional hardware and can be easily implemented by a simple integral operation. The effectiveness of the proposed algorithm is verified through several experimental results.

A Study on the Image Restoration in the Defocussed Image (Defocussed된 화상의 복#에 관한 연구)

  • 이명종;안수길
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.22 no.1
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    • pp.1-6
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    • 1985
  • The point spread function of defocussed image is known as two dimensional function, one of rectangular type and Gaussian type function and etc, and the defocussed image can be modeled as the convolved output between original image and the supposed PSF. But, in .case of analog method using the scanning line of TV camera, one dimensional Process can be effective, and it was shown thats the defocussed image can be analyzed as the convolved output betlween the original image and the pule with finite width in the horizontal irection. And uslng TV camera and a analog compound high pass filter, the restoration experiment Is matte and we have got some pictures with remarked improvements.

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Analysis of resistor matching and poly-Si TFT characteristics for the implementation of System-on-Glass using the existing analog circuits (System-on-Glass를 구현하기 위한 저항 matching 및 poly-Si TFT특성을 기존 아날로그 회로를 이용하여 분석)

  • Kim Dae-June;Lee Kyun-Lyeol;Yoo Changsik
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.2 s.332
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    • pp.15-22
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    • 2005
  • Using the existing analog circuits, required resistor matching and Poly-Si TFT characteristics are investigated for the implementation of analog circuits to be integrated on System-on-Glass. Matching requirements on resistor values, threshold voltage and mobility of poly-Si TFT are derived as a function of the resolution of display system. Also, the effective mobility of poly-Si TFT required for the realization of source driver is analyzed for various panel sizes.

The Design of the Linear Power Amplifier using Analog Feedforward Linearizer for IMT-2000 Band (아날로그 Feedforward 선형화기를 이용한 IMT-2000대역 선형증폭기 설계)

  • Park, Ung-Hui;Lee, Gyeong-Hui;Gang, Sang-Gi
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.39 no.6
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    • pp.285-291
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    • 2002
  • In this paper, the LPA(Linear Power Amplifier) using new analog feedforward linearizer for IMT-2000 frequency band(2110MHz∼2170MHz) is proposed and fabricated. The designed analog feedforward linearizer system possessing the characteristics of stable operation for input power variation is simple structure and small size. When two-tones in IMT-2000 frequency band are applied to an amplifier, this LPA have the average output power is about 30W and the IMD value is below about 60dBc without correcting the circuit. In camparision with an amplifier without feedforward system at the same output power, the supposed analog feedforward linear amplifier posseses improved the IMD characteristics of over 23dB.

An Optical Analog Encoder for Precise Angle Control of SRM (SRM의 정밀 각도제어를 위한 아날로그 엔코더)

  • 안진우;황형진;이동희;박성준
    • The Transactions of the Korean Institute of Power Electronics
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    • v.9 no.1
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    • pp.30-35
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    • 2004
  • In a switched reluctance motor drive, it is important to synchronize the stator phase excitation with the rotor position, Therefore the position of rotor is an essential information. Although high resolution optical encoder/resolvers we used to provide a precise position information, these sensors are expensive. And switching angles synchronizing using sensorless technique has some problems like a reliability and fluctuating of the preset value in the high-speed region, which is caused by the sampling period of the microprocessor. In this paper, a low cost analog encoder suitable for practical applications is proposed. And the control algorithm to generate switching signals using a simple digital logic is presented. The validity of the proposed analog encoder with a proper logic controller is verified from the experiments.

VLSIs for the MAC TV System - Part III. A Data and Clock Recovery Circuit (MAC 방식 TV 시스템용 IC의 설계 - III. 신호 및 클럭 복원기)

  • Moon, Yong;Jeong, Deog-Kyoon
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.32B no.12
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    • pp.1644-1651
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    • 1995
  • A data and clock recovery integrated circuit for MAC (Multiplexed Analog Component) TV standard is described. The chip performs the recovery of a system clock from a digitally encoded voice signal, clamping of a video signal for DC-level restoration, and precise gain control of a video signal in the presence of a large amplitude variation. A PLL (Phase Locked Loop) is used for timing recovery and a new gain control circuit is proposed which enhances its accuracy and dynamic range by employing two identical four-quadrant analog multipliers. The chip is designed in full custom with 1.5um BiCMOS technology, and layout verification is completed by post-simulation with the extracted circuit.

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Design and Implementation of hardware module to process contactless protocol(Type-B) for IC card (IC카드를 위한 비접촉 프로토콜(Type-B) 처리 모듈의 설계 및 구현)

  • Jeon, Yong-Sung;Park, Ji-Mann;Ju, Hong-Il;Jun, Sung-Ik
    • Proceedings of the KIEE Conference
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    • 2002.11c
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    • pp.481-484
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    • 2002
  • In recent, the contactless IC card is widely used in traffic, access control system and so forth. And its use becomes a general tendency more and more because of the development of RF technology and improvement of requirement for user convenience. This paper describes the hardware module to process contactless protocol for implementation contactless IC card. And the hardware module consists of specific digital logic circuits that analyze digital signal from analog circuit and then generate data & status signal for CPU, and that convert the data from CPU into digital signal for analog circuit.

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Optimal equivalent-time sampling for periodic complex signals with digital down-conversion

  • Kyung-Won Kim;Heon-Kook Kwon;Myung-Don Kim
    • ETRI Journal
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    • v.46 no.2
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    • pp.238-249
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    • 2024
  • Equivalent-time sampling can improve measurement or sensing systems because it enables a broader frequency band and higher delay resolution for periodic signals with lower sampling rates than a Nyquist receiver. Meanwhile, a digital down-conversion (DDC) technique can be implemented using a straightforward radio frequency (RF) circuit. It avoids timing skew and in-phase/quadrature gain imbalance instead of requiring a high-speed analog-to-digital converter to sample an intermediate frequency (IF) signal. Therefore, when equivalent-time sampling and DDC techniques are combined, a significant synergy can be achieved. This study provides a parameter design methodology for optimal equivalent-time sampling using DDC.

Design of a CMOS Base-Band Analog Receiver for Wireless Home Network (무선 홈 네트워크용 CMOS 베이스밴드 아날로그 수신단의 설계)

  • 최기원;송민규
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.2
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    • pp.111-116
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    • 2003
  • In this paper, a CMOS baseband analog receiver for wireless home network is discussed. It is composed of a Gilbert type mixer, an Elliptic 6th order 1ow pass filter, and a 6-bit A/D converter. The main role of the mixer is generating a mixed analog signal between the 200MHz output signal of CMOS RF stage and the 199MHz local oscillator. After the undesired high frequency component of the mixed signal comes out. Finally, the analog signal is converted into digital code at the 6-bit A/D converter, The proposed receiver is fabricated with 0.25${\mu}{\textrm}{m}$ 1-poly 5-metal CMOS technology, and the chip area is 200${\mu}{\textrm}{m}$ X1400${\mu}{\textrm}{m}$. the receiver consumes 130㎽ at 2.5V power supply.