• Transactions on Electrical and Electronic Materials
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• v.18 no.5
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• pp.250-252
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• 2017

High-performance full swing logic inverters were fabricated using amorphous 1 wt% Si doped indium-zinc-oxide (a-SIZO) thin films with different channel layer thicknesses. In the inverter configuration, the threshold voltage was adjusted by varying the thickness of the channel layer. The depletion mode (D-mode) device used a TFT with a channel layer thickness of 60 nm as it exhibited the most negative threshold voltage (-1.67 V). Inverters using enhancement mode (E-mode) devices were fabricated using TFTs with channel layer thicknesses of 20 or 40 nm with excellent subthreshold slope (S.S). Both the inverters exhibited high voltage gain values of 30.74 and 28.56, respectively at $V_{DD}=15V$. It was confirmed that the voltage gain can be improved by increasing the S.S value.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.1
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• pp.35-40
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• 1997

A new method to form the gate oxide and recrystllize the polycrystalline silicon (poly-Si) active layer simultaneously is proposed and fabricated successfully. During te irradiation of excimer laser, the poly-Si film is recrystallized, while the oxygen ion impurities injected into the amorphous silicon(a-Si) film are activated by laser energy and react with silicon atoms to form SiO2. We investigated the characteristics of the sample fabricated by proposed method using AES, TEM, AFM. The electrical performance of oxide was verified by ramp up voltage method. Our experimental results show that a high quality oxide, a pol-Si film with fine grain, and a smooth and clean interface between oxide and poly-Si film have been successfully obtained by the proposed fabrication method. The interface roughness of oxide/poly-Si fabricated by new method is superior to film by conventional fabrication os that the proposed method may improve the performance of poly-Si TFTs.

• Journal of the Korean Vacuum Society
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• v.2 no.4
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• pp.439-454
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• 1993

The phase sequence of codeposited Co-Si alloy and Co/si multilayer thin film was investigated by differential scanning calormetry(DSC) and X-ray diffraction (XRD) analysis, The phase sequence in codeposition and codeposited amorphous Co-Si alloy thin film were CoSilongrightarrow Co2Si and those in Co/Si multilayer thin film were CoSilongrightarrowCo2Silongrightarrow and CoSilongrightarrowCo2Si longrightarrowCoSilongrightarrowCoSi2 with the atomic concentration ration of Co to Si layer being 2:1 and 1:2 respectively. The observed phase sequence was analyzed by the effectvie heat of formatin . The phase determining factor (PDF) considering structural facotr in addition to the effectvie heat of formation was used to explain the difference in the first crystalline phase between codeposition, codeposited amorphous Co-Si alloy thin film and Co/Si multilayer thin film. The crystallinity of Co-silicide deposited by multitarget bias cosputter deposition (MBCD) wasinvestigated as a funcion of deposition temperature and substrate bias voltage by transmission electron microscopy (TEM) and epitaxial CoSi2 layer was grown at $200^{\circ}C$ . Parameters, Ear, $\alpha$(As), were calculate dto quantitatively explain the low temperature epitaxial grpwth of CoSi2 layer. The phase sequence and crystallinity had a stronger dependence on the substrate bias voltage than on the deposition temperature due to the collisional daxcade mixing, in-situ cleannin g, and increase in the number of nucleation sites by ion bombardment of growing surface.

• Korean Journal of Metals and Materials
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• v.49 no.4
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• pp.281-290
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• 2011

In order to gain better understanding of the selective surface oxidation and its influence on the galvanizability of a transformation-induced plasticity (TRIP) assisted steel containing 1.5 wt.% Si and 1.6 wt.% Mn, a model experiment has been carried out by depositing Si and Mn (each with a nominal thickness of 10 nm) in either monolayers or bilayers on a low-alloy interstitial-free (IF) steel sheet. After intercritical annealing at $800^{\circ}C$ in a $N_2$ ambient with a dew point of $-40^{\circ}C$, the surface scale formed on 590 MPa TRIP steel exhibited a microstructure similar to that of the scale formed on the Mn/Si bilayer-coated IF steel, consisting of $Mn_{2}SiO_{4}$ particles embedded in an amorphous $SiO_{2}$ film. The present study results indicated that, during the intercritical annealing process of 590 MPa TRIP steel, surface segregation of Si occurs first to form an amorphous $SiO_{2}$ film, which in turn accelerates the out-diffusion of Mn to form more stable Mn-Si oxide particles on the steel surface. During hot-dip galvanizing, particulate $Fe_{3}O_{4}$, MnO, and Si-Mn oxides were reduced more readily by Al in a Zn bath than the amorphous $SiO_{2}$ film. Therefore, in order to improve the galvanizability of 590 TRIP steel, it is most desirable to minimize the surface segregation of Si during the intercritical annealing process.

• 한국신재생에너지학회:학술대회논문집
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• 2007.06a
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• pp.280-283
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• 2007

The first grid-connected, building-integrated transparent amorphous silicon photovoltaic installation has been operated since October 2004 in Yongin, Korea. The 2.2kWp transparent PV system was applied to the facade of entrance hall in newly constructed KOLON E&C R&D building. The PV module is a nominal 0.98m ${\times}$ 0.95m, 10% transparent, laminated, amorphous(a-Si) thin-film device rated at 44 Wp per module. To demonstrate the architectural features of thin film PV technologies for daylighting application, transparent PV modules are attached to the building envelope with the form of single glazed window and special point glazing(SPG) frames. Besides power generation, the 10% transmittance of a-Si PV module provides very smooth natural daylight to the entrance hall without any special shading devices for whole year. The installation is fully instrumented and is continuously monitored in order to allow the performance assessment of amorphous silicon PV operating at the prevailing conditions. This paper presents measured power performance data from the first 12 months of operation. For the first year, annual average system specific yield was just 486.4kWh/kWp/year which is almost half of typical amorphous silicon PV output under the best angle and orientation. It should be caused by building orientation and self-shading of adjacent mass. Besides annual power output, various statistical analysis was performed to identify the characteristics of transparent thin film PV system.

• 한국정보디스플레이학회:학술대회논문집
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• 2000.01a
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• pp.67-68
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• 2000

Polycrystalline silicon (poly-Si) thin film transistors (TFT's) employing vertical amorphous silicon (a-Si) offsets have been fabricated without additional photolithography processes. The a-Si offset has been formed utilizing the poly-Si grain growth blocking effect by thin native oxide film during the excimer laser recrystallization of a-Si. The ON current degradation of the new device after 4 hour's electrical stress was reduced by 5 times compared with conventional poly-Si TFT's.

• Journal of the Korean institute of surface engineering
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• v.36 no.2
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• pp.141-147
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• 2003

Silicon carbide thin film was deposited in APCVD and LPCVD system with 1,3-DSB precursor 1,3-DSB is the single precursor to deposit SiC on Si at low temperature. SiC film was deposited at $850^{\circ}C$ lower than ordinary temperature ($1000~1200^{\circ}C$) in CVD process. SiC thin film glowed to high oriented (111) plane in APCVD system. In LPCVD system, SiC film groved to preferred (220) plane at same temperature. This discrepancy between preferred planes can be described by the difference of deposition mechanism. Amorphous phase and crystal defect were observed in APCVD system with the main growth mechanism of mass transport limited region. But in LPCVD system, we got the SIC film of uniform, faceted structure and high quality.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.8
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• pp.505-509
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• 2016

We have investigated the characteristics of amorphous silicon (a-Si) thin-film solar cell by inserting barrier layer. The conversion efficiency of a-Si thin-film solar cells on graphite substrate shows nearly zero because of the surface roughness of the graphite substrate. To enhance the performance of solar cells, the surface morphology of the back side were modified by changing the barrier layer on graphite. The surface roughness of graphite substrate with the barrier layer grown by plasma enhanced chemical vapor deposition (PECVD) reduced from ~2 um to ~75 nm. In this study, the combination of the barrier layer on graphite substrate is important to increase solar cell efficiency. We achieved ~ 7.8% cell efficiency for an a-Si thin-film solar cell on graphite substrate with SiNx/SiOx stack barrier layer.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.130-130
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• 2010

Thin Si films were grown by a plasma-enhanced chemical vapor deposition (PECVD, SNTEK, Korea) system. Two different deposition condition were applied and formed a fully amorphous Si (a-Si) film and a micromorph mixing of microcrystalline Si (mc-Si) and a-Si film. Under one sun illumination, the micromorph device provided the enhanced open circuit voltage and fill factor values. It presents the fabrication of the micromorph Si film and the a-Si film by modulating a deposition condition. The performances of the Si thin film Schottky solar cells are discussed.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.07a
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• pp.463-465
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• 2002

In order to increase perpendicular magnetic anisotropy of magnetic layer and prepare magnetic recording layer with a good quality by epitaxial growth between magnetic layer and, we prepared Co$\_$77/Cr$\_$20/Ta$_3$/Si doublelayer for perpendicular magnetic recording media which was promoted as next generation recording media on slide glass substrate. The thickness of magnetic layer and Underlayer were varied from 20 to 100 nm and 5 to 100 m, respectively. The surface morphology and crystal structure of the CoCrTa/Si film were examined with XRD and AFM. Prepared thin films showed improvement of dispersion angle of c-axis orientation Δ$\theta$$\_$50/ caused by inserting amorphous Si underlayer.