• 전력전자학회:학술대회논문집
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• 전력전자학회 2018년도 추계학술대회
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• pp.171-172
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• 2018

본 논문에서는 NPC (Neutral-Point-Clamped) 인버터와 ANPC (Active Neutral-Point-Clamped) 인버터의 특성과 성능을 비교 분석한다. ANPC 인버터는 기존의 NPC 인버터와 비교하여 스위칭 부하를 분산시켜 발열의 불균형을 해소하고 소자 수명을 증가시킨다. 기존의 NPC 인버터 시스템과 ANPC 인버터에 대하여 이론적인 특징과 성능을 분석하고 모델링과 시뮬레이션을 통하여 비교 분석한다.

• 전기전자학회논문지
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• 제24권1호
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• pp.170-177
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• 2020

본 논문은 HF/LF 변조 방법을 적용한 ANPC (active neutral point clamped) 인버터의 스위치 개방 고장에 대응하기 위한 허용 제어 방법을 제안한다. 기존 Si 기반 인버터에 비해 SiC MOSFET과 Si IGBT로 구성된 ANPC 인버터는 시스템의 효율이 높고 출력 품질이 우수하다. HF/LF 변조는 커뮤테이션 루프를 줄일 수 있어 MW 급 대용량 인버터를 위해 사용되는 변조 기법이다. MW 급 인버터의 스위치 개방 고장은 부하에 심각한 손상을 입히며, 인버터가 동작을 멈출 경우 막대한 경제적 손실을 야기한다. 제안하는 스위치 개방 고장의 허용 제어 기술은 ANPC 인버터의 지속적인 운전을 가능하게 하며 신뢰성을 향상 시킨다. 제안하는 기법의 성능은 시뮬레이션 결과를 통해 검증한다.

• 전력전자학회논문지
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• 제24권2호
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• pp.120-126
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• 2019

This study proposes a neutral voltage balance control scheme for stable fault-tolerant operation of an active neutral point clamped (ANPC) inverter using carrier-based pulse width modulation. The proposed scheme maintains the neutral voltage balance by reconfiguring the switching combination and modulating the reference output voltage in order to solve the degradation of the output characteristic in the fault tolerant operation due to the fault of the power semiconductor switch constituting the ANPC inverter. The feasibility of the proposed control scheme is confirmed by HIL experiment using RT-BOX.

• 전력전자학회논문지
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• 제24권6호
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• pp.459-462
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• 2019

This work presents methods for reducing overshoot voltages across the drain-source of silicon carbide (SiC) MOSFETs in grid-connected hybrid active neutral-point-clamped (ANPC) inverters. Compared with 3-level NPC-type inverter, the hybrid ANPC inverter can realize the high efficiency. However, SiC MOSFETs conduct its switching operation at high frequencies, which cause high overshoot voltages in such devices. These overshoot voltages should be reduced because they may damage switching devices and result in electromagnetic interference (EMI). Two major strategies are used to reduce the overshoot voltages, namely, adjusting the gate resistor and using a snubber capacitor. In this paper, advantages and disadvantages of these methods will be discussed. The effectiveness of these strategies is verified by experimental results.

• Journal of Electrical Engineering and Technology
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• 제12권5호
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• pp.1872-1882
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• 2017

Medium voltage drive systems driven by high-power multi-level inverters operating at low switching frequency can reduce the switching losses of the power device and increase the output power. Employing subsection synchronous current harmonic minimum pulse width modulation (CHMPWM) technique can maintain the total harmonic distortion of current at a very low level. It can also reduce the losses of the system, improve the system control performance and increase the efficiency of DC-link voltage accordingly. This paper proposes a subsection synchronous CHMPWM approach of active neutral point clamped five-level (ANPC-5L) inverter under low switching frequency operation. The subsection synchronous scheme is obtained by theoretical calculation based on the allowed maximum switching frequency. The genetic algorithm (GA) is adopted to get the high-precision initial values. So the expected switching angles can be achieved with the help of sequential quadratic programming (SQP) algorithm. The selection principle of multiple sets of the switching angles is also presented. Finally, the validity of the theoretical analysis and the superiority of the CHMPWM are verified through both the simulation results and experimental results.

• Journal of Power Electronics
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• 제17권4호
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• pp.923-932
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• 2017

This paper proposes a novel scheme which can compensate the common-mode voltage (CMV) for five-level active neutralpoint clamped (5L-ANPC) inverters, which is based on modifying the space vector pulse width modulation (SVPWM) and adding an auxiliary leg to the inverter. For the modified SVPWM, only the 55 voltage vectors producing low CMV values among the 125 possible voltage vectors are utilized, which varies over the three voltage levels of $-V_{dc}/12$, 0 V, and $V_{dc}/12$. In addition, the compensating voltage, which is injected into the 5L-ANPC inverter system to cancel the remaining CVM through a common-mode transformer (CMT) is generated by the additional NPC leg. By the proposed method, the CMV of the inverter is fully eliminated, while the utilization of the DC-link voltage is not decreased at all. Furthermore, all of the DC-link and flying capacitor voltages of the inverter are well controlled. Simulation and experimental results have verified the validity of the proposed scheme.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2012년도 추계학술대회 논문집
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• pp.7-8
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• 2012

본 논문에서는 3레벨 NPC(Neutral Point Clamped)와 Active NPC 인버터의 스위치 손실 분배 기법에 따른 출력전력 분석을 하였다. 기존 3레벨 NPC 인버터의 경우 특정 불균형한 스위치 발열 때문에 전력밀도를 높이 설계할 수 없다. 따라서 본 논문에서는 ANPC inverter의 손실 분배기법을 적용하여 시뮬레이션으로 검증하였다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2016년도 전력전자학술대회 논문집
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• pp.485-486
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• 2016

This paper proposes a new hybrid five-level voltage-source inverter topology, based on the conventional five-level active neutral-point-clamped topology (5L-ANPC), where the lower number of switching devices is required, resulting in saving the cost. The operating principle and control method of the proposed topology is described. The comparison of THD, power losses, loss distribution, and cost of components are evaluated among the proposed topology, the 5L-ANPC and 5L-DCI (diode-clamped inverters) topology.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2018년도 추계학술대회
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• pp.215-216
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• 2018

본 논문에서는 Carrier-Based Pulse Width Modulation(CBPWM)을 사용한 Active Neutral Point Clamped (ANPC) 인버터의 안정적인 고장 허용 운전을 위한 중성점 전압 균형 제어 기법을 제안한다. 제안된 기법은 ANPC 인버터를 구성하고 있는 전력 반도체 스위치의 고장으로 인한 고장 허용 운전 시, 출력 특성이 저하되는 문제점을 해결하기 위해 스위칭 조합의 재구성과 기준 출력전압의 변조를 통한 중성점 전압 균형을 유지한다. 제안된 기법의 타당성은 RT-BOX를 통한 HIL 시뮬레이터를 이용하여 확인하였다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2018년도 추계학술대회
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• pp.155-156
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• 2018

This paper presents a control method for grid-connected Active-NPC inverter systems. NPC (Neutral Point Clamped) is widely used in power conversion systems. NPC has a loss of switching elements and voltage imbalance. Active NPC has been proposed to overcome these drawbacks. ANPC changed the neutral diode to IGBT to reduce the switching loss. This paper modeled a grid-connected Acitve-NPC inverter systems and analyzed its performance. DSOGI PLL was used as a phase control method for precise control of grid link voltage. The proposed method is verified by PSIM simulation.