• Title/Summary/Keyword: A/D board

Search Result 786, Processing Time 0.025 seconds

Precise Measurement Method and Error Analysis with Roughness Variables for Estimation of Scattering Coefficients (지표면 산란 계수 예측을 위한 정확한 지표면 거칠기 변수 측정 방법 및 오차 분석)

  • Kweon, Soon-Koo;Hwang, Ji-Hwan;Oh, Yisok;Hong, Sungwook
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.24 no.1
    • /
    • pp.91-97
    • /
    • 2013
  • The input parameters of scattering models for computing the backscattering coefficients of earth terrains are mainly soil moisture and surface roughness. The backscattering coefficients of soil surfaces are more sensitive to surface roughness than soil moisture. In this study, we propose a precise measurement method for roughness parameters and analyze measurement errors. We measured surface roughness using a pin-board profiler(1 m, 0.5 cm interval) and a laser profiler(1 m, 0.25 cm interval). The measurement differences between two profilers in an average sense are 0.097 cm for root-mean-square (RMS) height and 1.828 cm for correlation length. The analysis of the correlation functions and relative errors shows that the laser measurements are more stable than the pin-board measurements. The differences of the calculated backscattering coefficients using a surface scattering model between pin-board and laser profiler measurements are less than 1 dB.

Shear Performance of Board-type Two-way Voided Slab (일체형 중공재의 중공부 내부형상에 따른 이방향 중공슬래브의 전단성능 평가)

  • Choi, Hyeon-Min;Park, Tae-Won;Paik, In-Kwan;Kim, Je-Sub;Han, Ju-Yeon
    • Journal of the Korea Concrete Institute
    • /
    • v.27 no.6
    • /
    • pp.651-659
    • /
    • 2015
  • Currently, social demands for long span building structures are increasing due to architectural planning purposes and economic efficiency. As a result, lighter board-type voiding materials were suggested. With the use of board-type voiding materials, a slab is able to become light weight and convenient. This process efficiently eliminates concrete where it is not required; considerably diminishing dead weight while maintaining the flexural strength of the slab. The reduction in concrete also allows for overall cost reductions and design flexibility. Also it can be ease with fixing the voided material that is composed of one body form. Although board-type voiding materials are ideal, the top and bottom concrete plates lack integrity. Because of this, test results show horizontal cracking towards the tops and bottoms of the concrete columns, or webs, connecting the slabs. The key to correcting this problem is to increase the shear strength. In order to increase the shear strength of the structure, horizontal shear area must increase. R70(100)-D-F has the largest horizontal shear area as it also shows stronger strength. As a result, shear strength ($V_{nh}$) is dependent on the horizontal shear area (N). $V_{nh}={\alpha}{\times}0.16{\sqrt{f_{ck}}}{\frac{{\pi}D^2}{4}}{\times}N({\alpha}=1.8125)$. The web columns have a shear span to depth ratio (a/d) that is less than 2; which classifies it as a deep beam. In this case, however, the shear strength of the deep beams may be as much as 2 to 3 times greater than that predicated conventional equations developed for members of normal proportions. As a result, ${\alpha}$ is suggested as an extra coefficient in the equation for shear strength ($V_{nh}$).

ON THE LARGE DEVIATION PROPERTY OF RANDOM MEASURES ON THE d-DIMENSIONAL EUCLIDEAN SPACE

  • Hwang, Dae-Sik
    • Communications of the Korean Mathematical Society
    • /
    • v.17 no.1
    • /
    • pp.71-80
    • /
    • 2002
  • We give a formulation of the large deviation property for rescalings of random measures on the d-dimensional Euclidean space R$^{d}$ . The approach is global in the sense that the objects are Radon measures on R$^{d}$ and the dual objects are the continuous functions with compact support. This is applied to the cluster random measures with Poisson centers, a large class of random measures that includes the Poisson processes.

Radiation testing of low cost, commercial off the shelf microcontroller board

  • Fried, Tomas;Di Buono, Antonio;Cheneler, David;Cockbain, Neil;Dodds, Jonathan M.;Green, Peter R.;Lennox, Barry;Taylor, C. James;Monk, Stephen D.
    • Nuclear Engineering and Technology
    • /
    • v.53 no.10
    • /
    • pp.3335-3343
    • /
    • 2021
  • The impact of gamma radiation on a commercial off the shelf microcontroller board has been investigated. Three different tests have been performed to ascertain the radiation tolerance of the device from a nuclear decommissioning deployment perspective. The first test analyses the effect of radiation on the output voltage of the on-board voltage regulator during irradiation. The second test evaluated the effect of gamma radiation on the voltage characteristics of analogue and digital inputs and outputs. The final test analyses the functionality of the microcontroller when using an external, shielded voltage regulator instead of the on-board voltage regulator. The results suggest that a series of latch-ups occurs in the microcontroller during irradiation, causing increased current drain which can damage the voltage regulator if it does not have short-circuit protection. The analogue to digital conversion functionality appears to be more sensitive to gamma radiation than digital and analogue output functionality. Using an external, shielded voltage regulator can prove beneficial when used for certain applications. The collected data suggests that detaching the voltage regulator can extend the lifespan of the platform up to approximately 350 Gy.

A Study on the Test Method of RLC Parallel Circuits on the Device-Mounted Electronic Circuit Board (부품이 실장된 전자회로보드의 RLC 병렬회로 검사기법에 대한 연구)

  • Ko Yun-Seok
    • The Transactions of the Korean Institute of Electrical Engineers D
    • /
    • v.54 no.8
    • /
    • pp.475-481
    • /
    • 2005
  • In the existing ICT technique, the mounted electronic devices on the printed circuit board are tested whether the devices are good or not by comparing and measuring the value of the devices after separating the devices to be tested from around it based on the guarding method. But, in case that resistance, inductor and capacitor are configured as a parallel circuit on the circuit pattern, values for each device can not be measured because the total impedance value of the parallel circuit is measured. Accordingly, it is impossible to test whether the parallel circuit is good or not in case that the measured impedance value is within the tolerance error. Also, it is difficult to identify that which device among R, L and C of the parallel circuit is bad in case that the measured impedance value is out of the tolerance error. Accordingly, this paper proposes a test method which can enhance the quality and productivity by separating and measuring accurately R, L and C components from the RLC parallel circuits on the device-mounted printed circuit board. First, the RLC parallel circuit to be test is separated electrically from around it using three-terminal guarding technique. And then R, L and C values are computed based on the total impedance values and phase angles between voltage and current of the parallel circuit measured from two AC input signals with other frequency, Finally, the availability and accuracy of the proposed test method is verified by reviewing the simulation results.

A Study of Methodology Developing Reconstructed body using Styrofoam Boards (스티로폼 보드를 이용한 연구용 재현바디 제작 방법 연구)

  • Choi, Young-Lim;Nam, Yun-Ja
    • Fashion & Textile Research Journal
    • /
    • v.10 no.5
    • /
    • pp.713-720
    • /
    • 2008
  • The purpose of this study was to propose the method reproducing three dimensional figure data to a reconstructed body by the styrofoam board. To make the reconstructed body, the 3D figure data were rotated to make symmetry and the surfaces were edited. The horizontal curves were gathered equally-spaced based on the waist horizontal plane. we proposed the process to cut the styrofoam board according to the horizontal curves, to assemble them to organize the shape of the body figure and to coat the surface with the knitted. The 3-dimensional figure data of straight type, swayback type, lean-back type and bend-forward type were selected and the reconstructed bodies were made as above. And the compatibility was verified by the measurement comparison and deviations between 3-dimensional figure data and reconstructed body.

A study on the development of BID-IPM (BID-IPM 개발에 관한 연구)

  • Oh, Pil-Kyoung;Yeon, Jae-Eul;Kim, Hee-Jun;Park, Min-Hee;An, Sung-Yun
    • Proceedings of the KIEE Conference
    • /
    • 2005.10c
    • /
    • pp.158-161
    • /
    • 2005
  • For low power motor control, there are increasing demands for compactness, cost effective and built in many functions. Hence Intelligent Power Module(IPM) is considered as an important technology in inverter-driven motor applications. Regarding BID-IPM(Built In DC/DC converter, Intelligent Power Module) newly developed to integrate NPT-IGBT, HVIC and Flyback converter in a compact package, this paper discussed design of BID-IPM and presented the experimental results by using signal source board and equivalent load test board.

  • PDF

A Study on the Test Strategy Based on SSA Technique for the Digital Circuit Boards in Production Line (SSA 기법에 기반한 생산조립라인의 디지털 부품 실장 PCB의 검사전략에 대한 연구)

  • Jung Yong-Chae;Ko Yun-Seok
    • The Transactions of the Korean Institute of Electrical Engineers D
    • /
    • v.54 no.4
    • /
    • pp.243-250
    • /
    • 2005
  • Test methodology is diversity by devices and the number of test pattern is tremendous because the digital circuit includes TTL and CMOS family ICs as well as high density devices such as ROM and RAM. Accordingly, the quick and effective test strategy is required to enhance the test productivity. This paper proposes the test strategy which is able to be applied efficiently to the diversity devices on the digital circuit board by analyzing the structure and characteristic of the digital device. Especially, this test strategy detects the faulted digital device or the faulted digital circuit on the digital board using SSA(Serial Signature Analysis) technique based on the polynomial division theory The SSA technique identifies the faults by comparing the reminder from good device with reminder from the tested device. At this time, the reminder is obtained by enforcing the data stream obtained from output pins of the tested device on the LFSR(Linear Feedback Shift Register) representing the characteristic equation. Also, the method to obtain the optimal signature analysis circuit is explained by furnishing the short bit input streams to the long bit input streams to the LFSR having 8, 12, 16, 20bit input/output pins and by analyzing the occurring probability of error which is impossible to detect. Finally, the effectiveness of the proposed test strategy is verified by simulating the stuck at 1 errors or stuck at 0 errors for several devices on typical 8051 digital board.

The development of Fetal Heart Rate monitoring system based on DSP processor (DSP 프로세서를 이용한 태아심음 및 자궁수축감시장치의 개발)

  • Jnag, D.P.;Kim, K.H.;Lee, Y.H.;Lee, Y.K.;Bak, M.I.;Lee, D.S.;Kim, S.I.
    • Proceedings of the KOSOMBE Conference
    • /
    • v.1996 no.05
    • /
    • pp.320-324
    • /
    • 1996
  • Digital fetal monitoring system based on the personal computer combined with the digital signal processing board was implemented. The DSP board acquires and digitally processes ultrasound fetal Doppler signal for digital rectification, FIR filtering, autocorrelation function calculation, its peak detection and MEDIAN filtering. The personal computer interfaced with the DSP board is in charge of graphic display, hardcopy, data transmission and on-line analysis of fetal heart rate change including and variability. I used a recursive technique for autocorrelation function computation method and MEDIAN filter which can greatly reduce the amount of calculation and accuracy. I also implemented analysis algorithm of fetal heart rate change based on normal fetal sample data in order to exact diagnosis.

  • PDF

Fabrication of the EBG structure for GNSS (Global Navigation Satellite Service 를 위한 EBG 구조체 제작)

  • Jang, Young-Jin;Chung, Ki-Hyun;Cho, Seung-Il;Yeo, Sung-Dae;Kim, Jong-Un;Kim, Seong-Kweon
    • Journal of Satellite, Information and Communications
    • /
    • v.9 no.4
    • /
    • pp.42-46
    • /
    • 2014
  • In this paper, a coil typed electromagnetic band gap (EBG) structure to be inserted in the printed circuit board (PCB) inner layer in order to stabilize the PCB power line is proposed and implemented for global-navigation satellite service (GNSS) with the bandwidth from 1.55GHz to 1.81GHz. From the measurement result of the PCB board including EBG structure, the insertion loss(S21) was measured below about -50dB. From these results, it is expected that the stabilization of power delivery network (PDN) structure in the PCB circuit design should be improved and the preparation to EMI will be effective.