• Journal of Electrical Engineering and Technology
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• 제1권3호
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• pp.308-312
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• 2006

The inductance difference between conducting layers of high-Tc superconducting (HTSC) power transmission cable causes the current sharing of each conducting layer to be unequal, which decreases the current transmission capacity of HTSC power cable. Therefore, the design for even current sharing in HTSC power transmission cable is required. In this paper, we investigated the current distribution of HTSC power cable with a shield layer dependent on the pitch length and the winding direction of each layer. To analyze the effect of the shield layer on the current sharing of the conducting layers of HTSC power cable, the current distribution of HTSC power cable without a shield layer was compared with the case of HTSC power cable with a shield layer. It could be found through the analysis from the computer simulations that the shield layer of HTSC power cable could be contributed to the improvement of current distribution of conducting layers at the specific pitch length and the winding direction of conducting layer. The result and discussion for the current distribution calculated for HTSC power transmission cable with a shield layer were presented and compared with the cable without a shield layer.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
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• pp.147-147
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• 2015

The multilayer structure of the organic light emitting diode has merits of improving interfacial characteristics and helping carriers inject into emission layer and transport easier. There are many reports to control hole injection from anode electrode by using transition metal oxide as an anode buffer layer, such as V2O5, MoO3, NiO, and Fe3O4. In this study, we apply thin films of LiF which is usually inserted as a thin buffer layer between electron transport layer(ETL) and cathode, as an anode buffer layer to reduce the hole injection barrier height from ITO. The thickness of LiF as an anode buffer layer is tested from 0 nm to 1.0 nm. As shown in the figure 1 and 2, the luminous efficiency versus current density is improved by LiF anode buffer layer, and the threshold voltage is reduced when LiF buffer layer is increased up to 0.6 nm then the device does not work when LiF thickness is close to 1.0 nm As a result, we can confirm that the thin layer of LiF, about 0.6 nm, as an anode buffer reduces the hole injection barrier height from ITO, and this results the improved luminous efficiency. This study shows that LiF can be used as an anode buffer layer for improved hole injection as well as cathode buffer layer.

• Bulletin of the Korean Chemical Society
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• 제32권3호
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• pp.943-946
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• 2011

The electronic absorption and surface morphology evolution of two types of molecular double layer thin films, copper phthalocyanine (CuPc) layer deposited on chloro[subphthalocyaninato]boron(III) (SubPc) layer, denoted as SubPc/CuPc, and vice versa, with various thicknesses were investigated using ultraviolet (UV)-visible spectroscopy and atomic force microscopy (AFM). Both types of double layer structures showed similar broadened absorption patterns in the UV-visible region that were consistent with the fitted spectra following simple linear combination of the single layer absorption spectra of the two materials. In contrast, the surface morphology of double layer structures was dependent on the order of deposition. For the CuPc/SubPc structures, surface morphology was characterized by elongated grains, which are characteristic of SubPc thin films, indicating that the morphological influence of the underlying CuPc layer on the subsequent SubPc layer was not large. For the SubPc/CuPc structures, however, the underlying SubPc layer acted as a morphological template for the subsequently deposited CuPc layer. It was also observed that the grain size of the CuPc layer varied according to the thickness of the underlying SubPc layer.

• 한국ITS학회 논문지
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• 제8권3호
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• pp.91-99
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• 2009

초고속 인터넷 서비스와 이동 통신의 발달, 그리고 Mobile Device 보급의 증가는 유비쿼터스(Ubiquitous) 기술의 발전을 촉진시키는 계기가 되었다. 와이브로 (WiBro, Wireless Broadband Internet) 시스템은 이동 중에도 무선 랜 (Wireless LAN) 보다 넓은 서비스 지원 영역에서 고속의 멀티미디어 서비스를 제공 받을 수 있는 MBWA(Mobile Broadband Wireless Access)기술이며, IP 기반의 백본 망(Backbone Network)로 구성된다. 이와 같은 무선 이동 통신 환경에서는 와이브로 시스템의 Layer 2(MAC Layer, Medium Access Control Layer)에서의 이동성 지원 기술뿐만 아니라 Layer 3(Network Layer)에서의 이동성 지원 프로토콜이 필요하며, 사용자가 이동 중에도 원활한 서비스를 제공받기 위해서는 핸드오버(Handovcr)의 지연 시간을 최소화 시켜야 한다. 따라서 본 논문에서는 IPv4 기반의 와이브로 망에서의 핸드오버 지연 단축 기법을 제안한다. 제안된 방법을 이동 단말(MS, Mobile Station)이 수신하는 신호 강도의 예측 값을 바탕으로 크로스 레이어 (Cross-Layer)기반의 고속 핸드오버 기법 (Fast Handover Scheme)을 적용하며, 지수평활법 (Exponential Smoothing Method)을 사용하여 예측 값을 계산한다. 모의 실험을 통해 기존의 방법과 제안된 방법을 비교, 분석하여 핸드오버 지연 시간의 단축을 증명한다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1997년도 춘계학술대회 논문집
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• pp.265-268
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• 1997

Electroluminescent(EL) devices are constructed using multilayer organic thin film. A cell structure of glass substrate/Indium-Tinoxide/TPD as a hole transporting layer/Alq3+Rhodamine 101 perchrolate(Red3) as an emitting layer/Alq3 as an electrron transporting layer/Al as an electrode was employed. Optimal thickness of emitting layer in EL cell was performed from the viewpoint of the electronics properties of emitting layers. The general vapor-deposition method was used to control the thickness of omitting layer in EL devices and electro-optical characteristics were measured. It is clarified that controlling thickness of emitting layer in vapor-deposition film had an effect on the change of carrier injection and EL spectrum. The intensity of red omission with luminance of 81cd/$m^2$ was achived at 11V driving voltage. The surface morphology of emitting layer in EL devices was investigated.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2002년도 International Meeting on Information Display
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• pp.766-769
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• 2002

We have seen the effects of hole-injection buffer layer in organic light-emitting diodes using copper phthalocyanine(CuPc), poly(vinylcarbazole)(PVK), and Poly(3,4-ethylenedioxythiophene):poly(styrene-sulfonate)(PEDOT:PSS) in a device structure of ITO/buffer/TPD/$Alq_3$/Al. Polymer PVK and PEDOT:PSS buffer layer was made using spin casting method and the CuPc layer was made using thermal evaporation. Current-voltage characteristics, luminance-voltage characteristics and efficiency of device were measured at room temperature with a thickness variation of buffer layer. We have obtained an improvement of the external quantum efficiency by a factor of two, four, and two and half when the CuPc, PVK, and PEDOT:PSS buffer layer are used, respectively. The enhancement of the efficiency is attributed to the improved balance of holes and elelctrons due to the use of hole-injection buffer layer. The CuPc and PEDOT:PSS layer functions as a hole-injection supporter and the PVK layer as a hole-blocking one.

• Journal of Mechanical Science and Technology
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• 제20권2호
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• pp.271-277
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• 2006

A numerical study is made of the spin-up from rest of a three-layer fluid in a closed, vertically-mounted cylinder. The densities in the upper layer $\rho_1$, middle layer $\rho_2$ and lower layer $\rho_3\;are\;\rho_3\;>\;\rho_2\;>\;\rho_1$, and the kinematic viscosities are left arbitrary. The representative system Ekman number is small. Numerical solutions are obtained to the time-dependent axisymmetric Navier-Stokes equations, and the treatment of the interfaces is modeled by use of the Height of Liquid method. Complete three-component velocity fields, together with the evolution of the interface deformations, are depicted. At small times, when the kinematic viscosity in the upper layer is smaller than in the middle layer, the top interface rises (sinks) in the central axis (peripheral) region. When the kinematic viscosity in the lower layer is smaller than in the middle layer, the bottom interface rises (sinks) in the periphery (axis) region. Detailed shapes of interfaces are illustrated for several cases of exemplary viscosity ratios.

• 한국가시화정보학회지
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• 제18권3호
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• pp.109-115
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• 2020

Five layers in mean flow are proposed by using the direct numerical simulation data of turbulent pipe flow up to Reτ = 3008. Viscous sublayer, buffer layer, mesolayer, log layer and core region are investigated. In the buffer layer, the viscous force is counterbalanced by the turbulent inertia from the streamwise mean momentum balance, and a log law occurs here. The overlap layer is composed of the mesolayer and the log layer. Above the buffer layer, the non-negligible viscous force causes the power law, and this region is the mesolayer, where it is the lower part of the overlap layer. At the upper part of the overlap layer, where the viscous force itself becomes naturally negligible, the log layer will appear due to that the acceleration force of the large-scale motions increases as the Reynolds number increases. In the core region, the velocity-defect form is satisfied with the power-law scaling.

• 한국세라믹학회:학술대회논문집
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• 한국세라믹학회 2003년도 추계총회 및 연구발표회 초록집
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• pp.179.2-179
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• 2003

• 한국초전도ㆍ저온공학회논문지
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• 제13권1호
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• pp.1-5
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• 2011

[ $CeO_2$ ]has been widely used for single buffer layer of coated conductor because of superior chemical and structural compatibility with $ReBa_2Cu_3O_{7-{\delta}}$(Re=Y, Nd, Sm, Gd, Dy, Ho, etc.). But, the surface of $CeO_2$ layer showed cracks because of the large difference in thermal expansion coefficient between metal substrate and deposited $CeO_2$ layer, when thickness of $CeO_2$ layer exceeds 100 nm on the biaxially textured Ni-3%W substrate. The deposition rate has been limited to be less than 6 $\AA$/sec in order to get a good epitaxy. In this research, we deposited $CeO_2$ single buffer layers on biaxially textured Ni-3%W substrate with 2-step process such as thin nucleation layer(>10 nm) with low deposition rate(3 $\AA$/sec) and thick homo epitaxial layer(>240 nm) with high deposition rate(30 $\AA$/sec). Effect of deposition temperature on degree of texture development was tested. Thick homo epitaxial $CeO_2$ layer with good texture without crack was obtained at $600^{\circ}C$, which has ${\Delta}{\phi}$ value of $6.2^{\circ}$, ${\Delta}{\omega}$ value of $4.3^{\circ}$ and average surface roughness(Ra) of 7.2 nm within $10{\mu}m{\times}10{\mu}m$ area. This result shows the possibility of preparing advanced Ni substrate with simplified architecture of single $CeO_2$ layer for low cost coated conductor.