• Title/Summary/Keyword: 해상 광대역 통신

Search Result 35, Processing Time 0.021 seconds

Spectral Analysis Method for Classification of Liquid Characteristics (액체의 특성 분류를 위한 스펙트럼 분석 방법)

  • Lee, Jonggil
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.20 no.12
    • /
    • pp.2206-2212
    • /
    • 2016
  • It is necessary to find characteristic phenomena related with permittivity differences for classification of liquid characteristics. If these phenomena can be remotely detected and characteristics can be extracted, it will be very useful in finding flammable liquid materials and classifying substances of these liquids. Therefore, in this paper, reflection and transmitted signals were analyzed from three receiving antennas with one transmitting antenna using wideband electromagnetic wave signals. Frequency response characteristics of reflected or transmitted signals are different according to characteristics of liquid materials. However, conventional FFT methods cannot be applied due to problems of low resolution caused by data windowing distortion. To minimize these problems, eigenvector analysis method was applied for high resolution spectrum estimation of received signals. From these results, it can be shown that classification of many kinds of liquids are possible using peak frequencies and corresponding peak power values of spectrum estimates obtained from various liquid materials.

Development of Wideband Frequency Modulated Laser for High Resolution FMCW LiDAR Sensor (고분해능 FMCW LiDAR 센서 구성을 위한 광대역 주파수변조 레이저 개발)

  • Jong-Pil La;Ji-Eun Choi
    • The Journal of the Korea institute of electronic communication sciences
    • /
    • v.18 no.6
    • /
    • pp.1023-1030
    • /
    • 2023
  • FMCW LiDAR system with robust target detection capabilities even under adverse operating conditions such as snow, rain, and fog is addressed in this paper. Our focus is primarily on enhancing the performance of FMCW LiDAR by improving the characteristics of the frequency-modulated laser, which directly influence range resolution, coherence length, and maximum measurement range etc. of LiDAR. We describe the utilization of an unbalanced Mach-Zehnder laser interferometer to measure real-time changes of the lasing frequency and to correct frequency modulation errors through an optical phase-locked loop technique. To extend the coherence length of laser, we employ an extended-cavity laser diode as the laser source and implement a laser interferometer with an photonic integrated circuit for miniaturization of optical system. The developed FMCW LiDAR system exhibits a bandwidth of 10.045GHz and a remarkable distance resolution of 0.84mm.

A 14b 100MS/s $3.4mm^2$ 145mW 0.18um CMOS Pipeline A/D Converter (14b 100MS/s $3.4mm^2$ 145mW 0.18un CMOS 파이프라인 A/D 변환기)

  • Kim Young-Ju;Park Yong-Hyun;Yoo Si-Wook;Kim Yong-Woo;Lee Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.43 no.5 s.347
    • /
    • pp.54-63
    • /
    • 2006
  • This work proposes a 14b 100MS/s 0.18um CMOS ADC with optimized resolution, conversion speed, die area, and power dissipation to obtain the performance required in the fourth-generation mobile communication systems. The 3-stage pipeline ADC, whose optimized architecture is analyzed and verified with behavioral model simulations, employs a wide-band low-noise SHA to achieve a 14b level ENOB at the Nyquist input frequency, 3-D fully symmetric layout techniques to minimize capacitor mismatch in two MDACs, and a back-end 6b flash ADC based on open-loop offset sampling and interpolation to obtain 6b accuracy and small chip area at 100MS/s. The prototype ADC implemented in a 0.18um CMOS process shows the measured DNL and INL of maximum 1.03LSB and 5.47LSB, respectively. The ADC demonstrates a maximum SNDR and SFDR of 59dB and 72dB, respectively, and a power consumption of 145mW at 100MS/s and 1.8V. The occupied active die area is $3.4mm^2$.

Design of FIR Filters With Sparse Signed Digit Coefficients (희소한 부호 자리수 계수를 갖는 FIR 필터 설계)

  • Kim, Seehyun
    • Journal of IKEEE
    • /
    • v.19 no.3
    • /
    • pp.342-348
    • /
    • 2015
  • High speed implementation of digital filters is required in high data rate applications such as hard-wired wide band modem and high resolution video codec. Since the critical path of the digital filter is the MAC (multiplication and accumulation) circuit, the filter coefficient with sparse non-zero bits enables high speed implementation with adders of low hardware cost. Compressive sensing has been reported to be very successful in sparse representation and sparse signal recovery. In this paper a filter design method for digital FIR filters with CSD (canonic signed digit) coefficients using compressive sensing technique is proposed. The sparse non-zero signed bits are selected in the greedy fashion while pruning the mistakenly selected digits. A few design examples show that the proposed method can be utilized for designing sparse CSD coefficient digital FIR filters approximating the desired frequency response.

A Design of 1.42 - 3.97GHz Digitally Controlled LC Oscillator (1.42 - 3.97GHz 디지털 제어 방식 LC 발진기의 설계)

  • Lee, Jong-Suk;Moon, Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.49 no.7
    • /
    • pp.23-29
    • /
    • 2012
  • The LC-based digitally controlled oscillator (LC-DCO), a key component of the all digital phase locked loop (ADPLL), is designed using $0.18{\mu}m$ RFCMOS process with 1.8 V supply. The NMOS core with double cross-coupled pair is chosen to realize wide tuning range, and the PMOS varactor pair that has small capacitance of a few aF and the capacitive degeneration technique to shrink the capacitive element are adopted to obtain the high frequency resolution. Also, the noise filtering technique is used to improve phase noise performance. Measurement results show the center frequency of 2.7 GHz, the tuning range of 2.5 GHz and the high frequency resolution of 2.9 kHz ~7.1 kHz. Also the fine tuning range and the current consumption of the core could be controlled by using the array of PMOS transistors using current biasing. The current consumption is between 17 mA and 26 mA at 1.8V supply voltage. The proposed DCO could be used widely in various communication system.