• Title/Summary/Keyword: 합성 제어

Search Result 998, Processing Time 0.028 seconds

A Study on 8kbps FBD-MPC Method Considering Low Bit Rate (Low Bit Rate을 고려한 8kbps FBD-MPC 방식에 관한 연구)

  • Lee, See-Woo
    • Journal of Digital Convergence
    • /
    • v.12 no.6
    • /
    • pp.271-276
    • /
    • 2014
  • In a speech coding system using excitation source of voiced and unvoiced, it would be involved a distortion of speech quality in case coexist with a voiced and unvoiced consonants in a frame. In this paper, I propose a method of 8kbps Multi-Pulse Speech Coding(FBD-MPC: Frequency Band Division MPC) by using TSIUVC(Transition Segment Including Unvoiced Consonant) searching, extraction and approximation-synthesis method in a frequency domain. I evaluate the 8kbps MPC and FBD-MPC. As a result, SNRseg of FBD-MPC was improved 0.5dB for female voice and 0.2dB for male voice respectively. Compared to the MPC, SNRseg of FBD-MPC has been improved that I was able to control the distortion of the speech waveform finally. And so, I expect to be able to this method for cellular phone and smart phone using excitation source of low bit rate.

A Design on the Wavelet Transform Digital Filter for an Image Processing (영상처리를 위한 웨이브렛 변환 디지털 필터의 설계)

  • Kim, Yun-Hong;Jeon, Gyeong-Il;Bang, Gi-Cheon;Lee, U-Sun;Park, In-Jeong;Lee, Gang-Hyeon
    • Journal of the Institute of Electronics Engineers of Korea CI
    • /
    • v.37 no.3
    • /
    • pp.45-55
    • /
    • 2000
  • In this paper, we proposed the hardware architecture of wavelet transform digital filter for an image processing. Filter bank pyramid algorithm is used for wavelet transform and each fillet is implemented by the FIR filter. For DWT computation, because the memory controller is implemented by hardware, we can efficiently process the multisolution decomposition of the image data only input the parameter. As a result of the image Processing in this paper, 33㏈ PSNR has been obtained on 512$\times$512 B/W image due to 11-bit mantissa processing in FPGA Implementation. And because of using QMF( Quadrature Mirror Filter) properties, it reduces half number of the multiplier needed DWT(Discrete Wavelet Transform) computation so the hardware size is reduced largely. The proposed scheme can increase the efficiency of an image Processing as well as hardware size reduced. The hardware design proposed of DWT fillet bank is synthesized by VHDL coding and then the test board is manufactured, the operating Program and the application Program are implemented using MFC++ and C++ language each other.

  • PDF

Novel 10 GHz Bio-Radar System Based on Frequency Multiplier and Phase-Locked Loop (주파수 체배기와 PLL을 이용한 10 GHz 생체 신호 레이더 시스템)

  • Myoung, Seong-Sik;An, Yong-Jun;Moon, Jun-Ho;Jang, Byung-Jun;Yook, Jong-Gwan
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.21 no.2
    • /
    • pp.208-217
    • /
    • 2010
  • This paper presents a novel 10 GHz bio-radar system based on a frequency multiplier and phase-locked loop(PLL) for non-contact measurement of heartbeat and respiration rates. In this paper, a 2.5 GHz voltage controlled oscillator (VCO) with PLL is employed to as a frequency synthesizer, and 10 GHz continuous wave(CW) signal is generated by using frequency multiplier from 2.5 GHz signal. This paper also presents the noise characteristic of the proposed system. As a result, a better performance and economical frequency synthesizer can be achieved with the proposed bio-radar system. The experimental results shows excellent bio-signal measurement up to 100 cm without any additional digital signal processing(DSP), and the proposed system is validated.

Searching Human Motion Data by Sketching 3D Trajectories (3차원 이동 궤적 묘사를 통한 인간 동작 데이터 검색)

  • Lee, Kang Hoon
    • Journal of the Korea Computer Graphics Society
    • /
    • v.19 no.2
    • /
    • pp.1-8
    • /
    • 2013
  • Captured human motion data has been widely utilized for understanding the mechanism of human motion and synthesizing the animation of virtual characters. Searching for desired motions from given motion data is an important prerequisite of analyzing and editing those selected motions. This paper presents a new method of content-based motion retrieval without the need of additional metadata such as keywords. While existing search methods have focused on skeletal configurations of body pose or planar trajectories of locomotion, our method receives a three-dimensional trajectory as its input query and retrieves a set of motion intervals in which the trajectories of body parts such as hands, foods, and pelvis are similar to the input trajectory. In order to allow the user to intuitively sketch spatial trajectories, we used the Leap Motion controller that can precisely trace finger movements as the input device for our experiments. We have evaluated the effectiveness of our approach by conducting a user study in which the users search for dozens of pre-selected motions from baseketball motion data including a variety of moves such as dribbling and shooting.

Fabrication of Nanoporous Alumina Mask and its Applications (나노다공성 알루미나 마스크의 제조 및 응용)

  • Jung, Mi;Choi, Jeong-Woo;Kim, Young-Kee;Oh, Byung-Ken
    • Korean Chemical Engineering Research
    • /
    • v.46 no.3
    • /
    • pp.465-472
    • /
    • 2008
  • Fabrication of nanostructured materials and synthesis of nanomaterials have intensively studied to realize electronic devices for nanotechnology. By using nanoporous alumina mask, nanostructured material can be fabricated in the form of uniform array. The size and the density of the nanostructured materials can be controllable by changing the pore diameter and the density of the alumina mask. This method is possible low cost and on large scale process, and feasible to contribute the fusion technology consisting of information technology, nanotechnology, and biotechnology. Therefore, these techniques provide alternative approaches for development of new electronic applications. In this paper, the fabrication technique and its applications of nanoporous alumina mask are described and nanostructured materials such as quantum dots, nanoholes, and nanorods are introduced.

Hierarchical Porous 3D gel of the Co3O4/graphene with Enhanced Catalytic Performance for Green Catalysis (녹색 촉매반응을 위한 코발트 옥사이드/그래핀의 계층적 다공성 3D 젤)

  • Jeong, Jae-Min;Jang, Sukhyeun;Kim, Yunsu;Kim, Hyun Bin;Kim, Do Hyun
    • Korean Chemical Engineering Research
    • /
    • v.56 no.3
    • /
    • pp.404-409
    • /
    • 2018
  • The integration of organic and inorganic building blocks into hierarchical porous architectures makes potentially desirable catalytic material in many catalytic applications due to their combination of dissimilar components and well-constructed reactant transport path. In this study, we prepared the hierarchical porous $Co_3O_4@graphene$ 3D gel by hydrothermal method to achieve high catalytic performance in PET glycolysis reaction. Obtained $Co_3O_4@graphene$ 3D gel consisted of interconnected networks of $Co_3O_4$ and graphene sheets, providing large number of accessible active sites for efficient catalytic reaction. These structural merits from synergistic effect of $Co_3O_4$ and graphene gave a high performance in the PET degradation reaction giving high conversion yield of BHET, fast degradation rate of PET, and remarkable stability.

Design of Programmable SC Filter (프로그램 가능한 SC Filter의 설계)

  • 이병수;이종악
    • The Journal of Korean Institute of Communications and Information Sciences
    • /
    • v.11 no.3
    • /
    • pp.172-178
    • /
    • 1986
  • The recent interest in the design of filters is motivatied by the fact that such filter can be fully integrated using standard metal-oxide-semiconductor processing technology. This is due to replacing all the resistors in the active RC filter network by the switched capacitors. The voltage gain of a SC filter depends only on the rations of capacitance and these ratios can be obtained and maintained to high accuracy. Therefore, it is known that a switched capacitor is much better than a resistor in temperature and linearity characteristics. This paper proposed a programmable SC filter and proved the fact that ${omega}_0$ Q and G of this circuit can be controlled by digital signal. Experiments show that SC filter remains the low sensitivities but it can't avoid little influence of parasitic capacitance. As the transfer characteristic of the SC filter is varied with sampling frequency and resistor array, SC filtering technigue can be applied for digital processing, speech analysis and synthesis and so on.

  • PDF

Hydrothermal Synthesis and Exfoliation of Mg/Al Layered Double Hydroxide with Tailored Aspect Ratio (수열 합성 및 박리에 의한 Mg/Al 층상 이중 수산화물의 종횡비 제어)

  • Hwang, Sung-Hwan;Kim, Donghyun;Kim, Yewon;Jung, Hyunsung
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.30 no.12
    • /
    • pp.822-827
    • /
    • 2017
  • Mg/Al layered double hydroxide with two-dimensional (2D) nanostructures was synthesized by a hydrothermal technique. The morphology and aspect ratio of $Mg_4Al_2(OH)_{14}3H_2O$ were controlled by the concentration and kinds of the hydrolysis agent, and temperature. The aspect ratio of $Mg_4Al_2(OH)_{14}3H_2O$ layered double hydroxides with the 2D hexagonal crystal structure was tailored from about 12.6 to about 45.7. The intercalated $CO{_3}^{2-}$ anions of the synthesized 2D $Mg_4Al_2(OH)_{14}3H_2O$ layered double hydroxides were exchanged to $NO_3{^-}$ anions. The bulk 2D $Mg_4Al_2(OH)_{14}3H_2O$ layered double hydroxides with the increased space between two layers due to the anion exchange were exfoliated in a formamide solution. The aspect ratio of the exfoliated 2D $Mg_4Al_2(OH)_{14}3H_2O$ layered double hydroxides increased to 570.3.

Evaluation of Structural Performance of Precast Modular Pier Cap (프리캐스트 모듈러 피어캡의 구조성능 평가)

  • Kim, Dong Wook;Shim, Chang Su
    • Journal of the Korea Concrete Institute
    • /
    • v.27 no.1
    • /
    • pp.55-63
    • /
    • 2015
  • Prefabrication technologies are making bridge construction safer and less disruptive to the environment and traveling public, making bridge designs more constructible and, improving the quality and durability by shifting site work to a more controllable environment. Modular bridge substructures with concrete-filled steel tube (CFT) piers and composite pier caps were suggested to realize accelerated bridge construction. The precast segmental pier cap consists of a composite pier table and precast prestressed segments on the table. The pier table has embedded steel section to mitigate stress concentration at the connection by small tubes. Each bridge pier has four or six CFT columns which connect to the pier cap. Shear strength of the pier cap was obtained by extending vertical reinforcing bars from the table to the precast segment. Transverse prestressing was introduced to control tensile stresses by service loadings. Structural performance of the proposed modular system was evaluated by static tests. Design requirements of the composite pier cap were satisfied by continuous reinforcing bars and prestressing tendons. Standardized modular substructures can be effectively utilized for the fast replacement or construction of bridges.

Hardware Design of High Performance CAVLC Encoder (H.264/AVC를 위한 고성능 CAVLC 부호화기 하드웨어 설계)

  • Lee, Yang-Bok;Ryoo, Kwang-Ki
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.49 no.3
    • /
    • pp.21-29
    • /
    • 2012
  • This paper presents optimized searching technique to improve the performance of H.264/AVC. By using the proposed forward and backward searching algorithm, redundant cycles of latency for data reordering can be removed. Furthermore, in order to reduce the total number of execution cycles of CAVLC encoder, early termination mode and two stage pipelined architecture are proposed. The experimental result shows that the proposed architecture needs only 36.0 cycles on average for each $16{\times}16$ macroblock encoding. The proposed architecture improves the performance by 57.8% than that of previous designs. The proposed CAVLC encoder was implemented using Verilog HDL and synthesized with Magnachip $0.18{\mu}m$ standard cell library. The synthesis result shows that the gate count is about 17K with 125Mhz clock frequency.