• Air Cleaning Technology
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• v.33 no.4
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• pp.38-47
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• 2020

• Korean Institute of Interior Design Journal
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• v.21 no.2
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• pp.101-111
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• 2012

The purpose of this study is to draw emotional evaluation model related to LED lighting colors and suggest basic informations that enable planned directions of architectural pacade lighting to simulate beforehand in a laboratory. As experimental methods, extracted PAD emotional evaluation model and then directed a experimental model of 10 LED lighting colors, studied and analyzed survey questions. The results are as follows; First, in the case of P(Pleasure-Unpleasure), Red, Yellow, Green, Cyan, Magenta, White and Combination of $G{\leftrightarrow}B$ Colors are satisfying, vibrant and positive distribution chart has shown. Second, in the case of A(Arousal-Unarousal), Red, Yellow, Green, Cyan, Blue, White and Combinations of $R{\leftrightarrow}G$, $G{\leftrightarrow}B$, $R{\leftrightarrow}B$ Colors, it makes a little difference, they have shown useful distribution chart to induce sight in a aroused state. Third, in the case of D(Dominance-Submissiveness), Red, Cyan, Green and Combinations of $G{\leftrightarrow}B$ Colors are free, controlling and extent of effect was excellent. On the contrary, in the case of Yellow and Magenta and Combinations of $R{\leftrightarrow}B$, they are gentle and arouse the protective instinct or feminine distribution chart has shown. Fourth, it showed difference of preference that difference of select ratios of both men and women in Orange, Blue, Greenish-Yellow (preference of man) and Magenta, Combinations of $R{\leftrightarrow}B$ Colors(preference of woman).

• Journal of the Korea Convergence Society
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• v.2 no.3
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• pp.15-23
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• 2011

This paper deals with the analysis for the operation characteristic of PV 3 phase inverter, considering the state equation through d-q coordinates transformation, and proposes an algorithm of controlling current using PI(Proportional Integral) controller to control the output and the theory algorithm of sinusoidal PWM method to design inverter. And also this paper performs PV modelling using PSCAD/EMTDC S/W which is commonly used in analysis of distribution system and confirms effectiveness of the modelling proposed in this paper by analyzing and comparing the EMTDC/PSCAD simulation result with the theoretical method.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.40 no.6
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• pp.565-571
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• 2016

This paper investigates macro- and microscopic fractography performed on fracture specimens from low cycle fatigue (LCF) testings through an Alloy 617 base metal and weldments. The weldment specimens were taken from gas tungsten arc welding (GTAW) pad of Alloy 617. The aim of the present study is to investigate the macro- and microscopic aspects of the low cycle fatigue fracture mode and mechanism of Alloy 617 base metal and GTAWed weldment specimens. Fully axial total strain controlled fatigue tests were conducted at room temperature with total strain ranges of 0.6, 0.9, 1.2 and 1.5%. Macroscopic fracture surfaces of Alloy 617 base metal specimens showed a flat type normal to the fatigue loading direction, whereas the GTAWed weldment specimens were of a shear/star type. The fracture surfaces of both the base metal and weldment specimens revealed obvious fatigue striations at the crack propagation regime. In addition, the fatigue crack mechanism of the base metal showed a transgranular normal to fatigue loading direction; however, the GTAWed weldment specimens showed a transgranular at approximately $45^{\circ}$ to the fatigue loading direction.

• The Journal of the Acoustical Society of Korea
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• v.25 no.2
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• pp.61-71
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• 2006

An MP3 encoder chip has been designed and fabricated with the hardware and software co-design concepts. In the aspect of the software. the calculation cycles of the distortion control loop. which requires most of the calculation cycles in MP3 encoding procedure. have been reduced to $67\%$ of the original algorithm through the 'scale factor Pre-calculation'. By using a floating Point 32 bit DSP core and designing the FFT block with the hardware. we can get the additional reduction of the calculation cycles in addition to the software optimization. The designed chip has been verified using HW emulation and fabricated via 0.25um CMOS technology The fabricated chip has the size of $6.2{\time}6.2mm^2$ and operates normally on the test board in the qualitative and quantitative aspect.