• Title/Summary/Keyword: 포워딩 엔진

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An Implementation of Forwarding Engine supporting Various Physical Interfaces based on Network Processor (다양한 물리 접속을 지원하는 네트워크 프로세서 기반 포워딩 엔진 구현)

  • Park Wanki;Kim Daeyoung
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.5 s.335
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    • pp.23-28
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    • 2005
  • Recently, new concept, NP(Network Processor) was emerged into communication systems to cope with the various service requirements from Internet users. NP is an unique promising technique to capable of implementing of the packet processing in wire-speed and providing the flexibility for supporting the newly network services, having satisfied with implementation using hardware and software respectively in past, This paper deals with the implementation techniques and evaluation results of the line card capable to do packet forwarding function with packet processing power of wire-speed and applicable to various physical interfaces. There are several interfaces of POS, Gigabit ethernet and EPON in E-OLT(EPON Optical Line Terminal) system of PATH(Photonic Access To Home) network. Therefore, the E-OLT's packet forwarding engine have to support various subscriber's interface in wire speed. Our system is implemented the subscriber's card in daughter board and the setup procedure is done by system firmware based on the module's identifier acquired from installed physical board.

Design and Performance Evaluation for VPNs based (MPLS 기반 VPN 제공을 위한 설계 및 성능 분석)

  • Yu, Young-Eel;Chon, Byoung-Sil
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.39 no.7
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    • pp.1-11
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    • 2002
  • This paper proposes that an efficient routing entry sending method between routing controller FE. based on this method, we organize IP VPN support method based on MPLS network and design MPLS-VPN service control module, MPLS-VPN processing, VPN group configuration and LSP setup processing. We evaluate the performance about the VPN based on proposed MPLS, at the result of evaluation. We figure out that based on proposed IPC method, lost packets number reduces and delay increases more slowly in case of VPN based on MPLS comparing with the VPN based on ATM which has rapid delay increasement. Therefore we confirm that the VPN based on MPLS has high speed of packet processing and high utilization of buffers through the performance evaluation.

A Parallel IP Address Lookup Scheme for High-Speed Routers (고속의 라우터를 위한 병렬 IP 주소 검색 기법)

  • Park, Jae-hyung;Chung, Min-Young;Kim, Jin-soo;Won, Yong-gwan
    • The KIPS Transactions:PartA
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    • v.11A no.5
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    • pp.333-340
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    • 2004
  • In order that routers forward a packet to its destination, they perform IP address lookup which determines the next hop according to the packet's destination address. In designing high speed routers, IP address lookup is an important issue. In order to design high speed routers, this paper proposes a parallel IP lookup scheme which consists of several IP lookup engines without any modification of already fabricated indirect IP lookup chipsets. Also, we propose a simple rule for partitioning IP prefix entries In an overall forwarding table among several IP lookup engines. And we evaluate the performance of the proposed scheme in terms of the memory size required for storing lookup information and the number of memory accesses on constructing the forwarding table. With additional hardware logics, the proposed scheme can reduce about 30% of the required memory size and 80% of the memory access counts.

Design and Implementation of an Edge Router having ATM and Ethernet Interfaces using the Programmable Ethernet Packet Processor (프로그램 가능한 이더넷 패킷 프로세서를 이용한 ATM과 Ethernet 인터페이스를 갖는 에지 라우터의 설계 및 구현)

  • Park, Jae-Hyung;Kim, Mi-Hee;Lee, Yoo-Kyung
    • The KIPS Transactions:PartC
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    • v.9C no.6
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    • pp.903-910
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    • 2002
  • As the edge router provides the facility that it is capable of interworking with various kinds of networks, the forwarding engine should have the flexibility processing the corresponding types of frames from such network interfaces. In order to support the flexibility, we design and implement a prototype of edge router with ATM and Ethernet interfaces based on the programmable Ethernet packet processor Our forwarding engine handles and forwards the frames from ATM interfaces by using loop-back functionality of Ethernet packet processor. The performance of our edge router is evaluated by experiments throughout its performance of forwarding engine and tested by interworking with another kinds of routers.

A Performance Enhancement Scheme of IP Address Lookups based on Compressed-Tries (압축 Trie에 기반한 IP 주소 탐색의 성능 향상을 위한 기법)

  • Jang, Ik-Hyeon;Park, Jae-Hyung;Chung, Min-Young
    • Proceedings of the Korea Information Processing Society Conference
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    • 2003.05b
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    • pp.1325-1328
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    • 2003
  • 포워딩 엔진은 외부 인터페이스를 통해서 들어오는 패킷에 대해서 IP 주소를 기반으로 목적지로 향하는 다음 홉을 결정한다. 이러한 고성능의 패킷 처리를 위한 포워딩 엔진을 설계함에 있어서 IP 주소 탐색은 중요한 요인이다. 본 논문에서는 검색경로 압축 트라이에 기반한 IP 주소 탐색 알고리즘의 성능을 향상시키는 분할 압축 탐색 기법을 제시한다. 제시된 분할 기법을 통해서 IP 주소 탐색의 메모리접근 횟수를 줄인 수 있으며, 프로그램 가능한 네트워크 프로세서에 적용할 수 있다.

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A Partitioned Compressed-Trie for Fast IP Address Lookups (빠른 IP 주소 탐색을 위한 분할 압축 Trie)

  • Jang, Ik-Hyeon;Do, Jae-Su;Park, Jae-Hyung
    • Proceedings of the Korea Information Processing Society Conference
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    • 2003.11b
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    • pp.1309-1312
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    • 2003
  • 포워딩 엔진은 외부 인터페이스를 통해서 들어오는 패킷에 대해서 IP 주소를 기반으로 목적지로 향하는 다음 흡을 결정한다. 이러한 고성능의 패킷 처리를 위한 포워딩 엔진을 설계함에 있어서 IP 주소 탐색은 중요한 성능 요인이다. 본 논문에서는 검색 경로 압축 트라이에 기반한 IP 주소 탐색의 성능을 향상시키는 분할된 경로압축트라이 구조를 제안한다. 제안된 기법은 IP주소를 여러 개의 분할 압축 트라이로 나누어서 주소탐색이 하나의 분할된 압축트라이에서만 이루어지도록 하여 탐색시간을 줄인다.

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A High PErformance Lookup Controller for ATM based IP Packet Forwarding Engine (ATM 기반 IP 패킷 포워딩 엔진을 위한 고성능 룩업 제어기)

  • Choi, Byeong-Cheol;Kwak, Dong-Yong;Lee, Jeong-Tae
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.4B
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    • pp.298-305
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    • 2003
  • In this paper, we proposed a high performance lookup controller for IP packet forwarding engine of ATM based label edge routers. The lookup controller is designed to provide services such as MPLS, VPN, ELL, and RT services as well as the best effort. For high speed searching for IP addresses, we employed a TCAM based hardware search device not using traditional algorithmic approaches. We also implement lookup control functions into FPGA for fast processing of packet header and lookup control. The proposed lookup controller is designed to support differenciated services for users and to process in pipelined mechanism for performance improvement. A two-step search scheme is also applied to perform lookup for the key combined with multi-field of packet header. We found that the proposed lookup controller provides the performance of about 16M packets per second through simulations.

The Bit-Map Trip Structure for Giga-Bit Forwarding Lookup in High-Speed Routers (고속 라우터의 기가비트 포워딩 검색을 위한 비트-맵 트라이 구조)

  • Oh, Seung-Hyun;Ahn, Jong-Suk
    • Journal of KIISE:Information Networking
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    • v.28 no.2
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    • pp.262-276
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    • 2001
  • Recently much research for developing forwarding table that support fast router without employing both special hardware and new protocols. This article introduces a new forwarding data structure based on the software to enable forwarding lookup to be penormed at giga-bit speed. The forwarding table is known as a bottleneck of the routers penormance due to its high complexity proportional to the forwarding table size. The recent research that based on the software uses a Patricia trie and its variants. and also uses a hash function with prefix length key and others. The proposed forwarding table structure construct a forwarding table by the bit stream array in which it constructs trie from routing table prefix entries and it represents each pointer pointing the child node and the associated forwarding table entry with one bit The trie structure and routing prefix pointer need a large memory when representing those by linked-list or array. but in the proposed data structure, the needed memory size is small enough since it represents information with one bit. Additionally, by use a lookup method that start searching at desired middle level we can shorten the search path. The introduced data structure. called bit-map trie shows that we can implement a fast forwarding engine on the conventional Pentium processor by reducing the backbone routing table fits into Level 2 cache of Pentium II processor and shortens the searching path. Our experiments to evaluate the performance of proposed method show that this bit-map trie accomplishes 5.7 million lookups per second.

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Design and Implementation of an IPv6 Multicast Forwarding Module on the IXP2400 Network Processor (IXP2400 네트워크 프로세서를 이용한 IPv6 멀티캐스트 포워딩 모듈의 설계 및 구현)

  • Song Jisoo;Park Woojin;Kim Daehee;An Sunshin
    • Proceedings of the Korean Information Science Society Conference
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    • 2005.07a
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    • pp.625-627
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    • 2005
  • 본 논문은 인텔사의 IXP2400 네트워크 프로세서를 이용하여 IPv6 multicast-enabled 라우터 개발의 예비단계로서 IPv6 멀티캐스트 모듈의 전체적인 설계 및 구현을 다룬다. 특히, 마이크로 엔진할당, IPv6 멀티캐스트 마이크로 블록 및 패킷 복사 마이크로 블록에 중점을 둔다. 우리의 IPv6 멀티캐스트 포워딩 모듈의 성능측정 결과는 이론적 한계치의 $86\%$였다.

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Route Lookup Algorithm in IXP1200 Network Processor (IXP1200 Network Processor에서의 Route Lookup Algorithm에 관한 연구)

  • 정영환;박우진;황광섭;배국동;안순신
    • Proceedings of the Korean Information Science Society Conference
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    • 2002.04a
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    • pp.472-474
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    • 2002
  • 최근 동영상, 음성 등 멀티미디어 트래픽의 급속한 증가로 네트웍에서 요구되는 전송률은 점점 증가될 전망이다. 이에 따라 라우터도 요구되는 전송률에 대처해 나가기 위해 고속화 되어가고 있다. 이러한 고속 라우터 개발을 가능하게 하는 여러가지 Route Lookup 알고리즘들이 연구되어 왔다. 본 논문에서는 효율적인 Lookup 알고리즘의 원리와 여러 가지 Lookup 알고리즘들에 대해서 알아보고 IXP1200 Network Processor를 이용한 포워딩 엔진 개발에 있어서 사용된 Route Lookup알고리즘을 분석하여 그 효율성에 대해서 연구해 본다.

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