• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2000.10a
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• pp.463-467
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• 2000

In this paper, we have implemented the Web Server Patient Monitoring System using PPP. It is composed of two parts. The first part is the Analog board for acquiring ECG signals. The second part is the module for processing and transmitting the acquired signal. The second part is using PPP for dial-up networking, TCP/IP for Internet, HTTP for web browser and JAVA program for a Patient Monitoring Program in one chip. In home, it is not need to establish another network line because it uses a telephone line. And a user who want to monitor a patient's biosignal can monitor a patient without wholly open network because it is the network sewer. The Patient Monitoring Program runs on a web browser by downloaded JAVA codes when a user connect to this system. It can make the Home Patient Monitoring Program decrease cost. It can help to avoid the limitation of monitoring a patient.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.11
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• pp.2525-2531
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• 2012

Al-Cu alloy has been used as a circuit material for its low resistance and ease to process for long years at CMOS technology. However, basically metal is very susceptible to corrosion and which has been a long pending trouble in various fields using metal. The defect causes the reliability concerns, so improved methods are necessary to reduce the defect. In the various corrosion parameters, PR strip process conditions after metal etch and optimal cleaning solutions are controllable and increase the process margin to prevent the metal corrosion. This study proposes that chlorine residue after metal etch as the source of metal corrosion, and charges should be removed by optimizing PR strip process condition and cleaning condition.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.5A
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• pp.451-459
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• 2007

RFID it reads information which is it writes, the semiconductor chip for and the radio frequency system which uses the hazard antenna it has built-in transmission of information it talks. Formation which is transmitted like this collection and America which it filtrates wey the RFID search service back to inform the location of the server which has commodity information which relates with an object past record server. The hazard where measurement analysis result the leader for electronic interference does not occur consequently together from with verification test the power level which is received from the antenna grade where it stands must maintain minimum -55dBm and the electronic interference will not occur with the fact that, antenna and reel his recognition distance the maximum 7m until the recognition which is possible but smooth hazard it must stand and and with the fact that it will do from within and and and 3-4m it must be used Jig it is thought.

• Journal of Welding and Joining
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• v.13 no.4
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• pp.7-13
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• 1995

마이크로솔더링에 의한 전자기기는, 사회기능의 중추가 되는 컴퓨터, 통신 기기, 항공기 인공위성 등의 제어계를 구성하므로, 그 접속부에 대한 높은 신뢰성의 요구는 그 무엇보다 중요하다. 전자기기에 있어서의 솔더 접속부는 집과 기판의 전기 적.기계적 접속의 역할을 하고 있으며, 따라서 개개의 접속부의 파단은 전체의 불량 으로 연결된다. 실제 전자콤포넌트와 그 시스템의 단선 등의 사고에 있어서 자주 발생 하는 사고중의 하나가 솔더접속부의 단선에 의한 것이며, 그 단선중에서도 가장 보편 적이며 또한 대단히 심각한 문제로서 주목을 받고 있는 것이 솔더접속부의 열피로파단 이다. 전자기기를 사용할 때, 스위치의 on-off에 의한 power cycle과 환경의 온도변화 에 기인하는 반복열 사이클은 솔더접속부의 피로를 일으키게 되고, 결국에는 사용중에 파단을 초래하게 된다. 이러한 온도변화의 범위는 약 -55.deg. - 150.deg.C로 예상할 수 있으며, 여기서 최고온도인 150.deg.C는 Pb-Sn 공정합금의 경우 0.9Tm.p.이상의 고온에 해당한다. 이 피로는 등온적으로 또는 열사이클중에 발생하기도 한다. 솔더접 속부의 열피로수명은 대부분의 공업재료에서 나타나는 저사이클피로거동과 유사하게 발생하며, 솔더 접속부에 인가되는 열변형/응력(thermal strain/stress)의 크기에 크게 의존하는 것으로 알려져 있다. 솔더는 서로 다른 열팽창계수를 갖는 칩과 회로 기관의 두종류의 재료를 접속하기 때문에, 상기한 바와 같은 반복열사이클에 의하여 발생하는 열변형/응력이 접속부의 피로.파단을 야기시킨다. 이러한 솔더접속부에 대한 주기적인 응력/변형의 인가는 접속부에 내.외적으로 현저한 변화를 야기시키게 되고, 열피로로 연결되며 결국에는 시스템의 전기적 단선을 초래하게 된다. 또한 열피로파단 현상는 변형/응력의 크기 뿐 만아니라 솔더합금자체의 야금학적인 물성에도 크게 의존 하며, 내적.외적인 열변화에 의한 야금학적인 특성변화도 크게 영향을 미친다. 솔더 접속부의 신뢰성에 대한 연구는, 그 중요성에 비추어 볼 때, 지금까지 수많은 연구가 행하여져 왔다. 그러나 신뢰성과 관련된 열피로파단현상에 대한 야금학적인 면에서의 연구는 비교적 적은 편이다. 따라서 본 해설에서는 전자기기의 마이크로 솔더접속부 에서 발생하는 열피로파단현상에 대한 야금학적인 면에 중점을 두어 서술하고자 한다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.1 s.343
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• pp.79-84
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• 2006

This paper proposed a novel H.264 deblocking filter for low-power mobile multimedia SoCs. In H.264 deblocking filter, filtering can be skipped on some pixels when pixel value differences satisfy some specific conditions. Furthermore, whole filtering can be skipped when quantization parameter is less than 16. Based on these features, power consumption can be significantly reduced by shutting down deblocking filter partially or as a whole. The proposed deblocking filter can shut down partial or whole blocks with simple control circuits. Common hardware performs both horizontal filtering and vertical filtering. It was implemented in silicon chip using $0.35{\mu}m$ standard cell library technology. The gate count is about 20,000 gates. The maximum operation frequency is 108MHz. The maximum throughput is 30 frame/s with CCIR601 image format.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.5
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• pp.57-66
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• 1999

This paper describes a 12b, 50 Msample/s CMOS AID converter using an acquisition-time minimization technique for the high-speed sampling rate of 50 MHz level. The proposed ADC is implemented in a $0.35\mu\textrm{m}$ double-poly five-metal n-well CMOS technology and adopts a typical multi-step pipelined architecture to optimize sampling rate, resolution, and chip area. The speed limitation of conventional pipelined ADCs comes from the finite bandwidth and resulting speed of residue amplifiers. The proposed acquisition-time minimization technique reduces the acquisition time of residue amplifiers and makes the waveform of amplifier outputs smooth by controlling the operating current of residue amplifiers. The simulated power consumption of the proposed ADC is 197 mW at 3 V with a 50 MHz sampling rate. The chip size including pads is $3.2mm\times3.6mm$.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.3 s.357
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• pp.59-64
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• 2007

This paper describes the PLL of TCON(Timing Controller) chip for FPD(Flat Panel Display). We propose a new V-I converter which is insensitive to the power supply variation when it is applied to the TCON. The new V-I converter compensated the output frequency of VCO by appling the current that is inversely proportional to the voltage variation. The proposed idea is implemented with a 1-ploy 3-metal 0.25m TSMC CMOS technology and has the output frequency range from 192MHz to 360MHz at the supply voltage of 2.5V. Measurement result shows the RMS jitter of 100ps in the above output frequency range.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.2
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• pp.431-436
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• 2009

Home network is a rapidly growing area as new technologies are emerging, and new applications are being developed. The progress of home network technologies is growing the home network management technology for control and management of the digital appliances. Embodiment of these home network show marked ich have use for complicated and diversifiable processing. Design of home network system does very important stage through home network comes essential pars. In this paper, We designed and constitute Home network system which designs module using embedded system, STR710F Chip and CC2420 RF Module-Chip with the intention for using RS232C and USB.

• The KIPS Transactions:PartB
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• v.13B no.5 s.108
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• pp.507-514
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• 2006

Various application systems are developed using RFID as a part of ubiquitous computing, and it is expected that RFID chip will become wide-spread for the distribution industry especially. Efficient and efact intelligent-type of warehouse management system is essential for small-to-medium-sized enterprises in the situation having a trouble in the viewpoint of expense and manpower. In this paper, we implement small-scale warehouse management system using log-based context awareness technology. This system is implemented to be controlled on web, configuring clients to control RFID readers and building up DBMS system in a server. Especially, it grasps user's intention of storing or delivering based on toE data for the history of user's access to the system and it reports user's irregular pattern of warehouse use and serves predictive information of the control of goods in stock. As a result, the proposed system can contribute to enhance efficiency and correctness of small-scale warehouse management.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.3
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• pp.1-7
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• 2012

A 9b MS/s CMOS cyclic folding A/D converter (ADC) for intelligent battery sensor and battery management systems is proposed. The proposed ADC structure is based on a cyclic architecture to reduce chip area and power consumption. To obtain a high speed ADC performance, further, we use a folding-interpolating structure. The prototype ADC implemented with a 0.35um 2P4M n-well CMOS process shows a measured INL and DNL of maximum 1.5LSB and 1.0LSB, respectively. The ADC demonstrates a maximum SNDR and SFDR of 48dB and 60dB, respectively, and the power consumption is about 110mW at 2MS/s and 3.3V. The occupied active die area is $10mm^2$.