• Title/Summary/Keyword: 채널도핑분포

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Analysis of Subthreshold Swing for Double Gate MOSFET Using Gaussian Function (가우스함수를 이용한 DGMOSFET의 문턱전압이하 스윙분석)

  • Jung, Hak-Kee;Han, Ji-Hyung;Lee, Jae-Hyung;Jeong, Dong-Soo;Lee, Jong-In;Kwon, Oh-Shin
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.05a
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    • pp.681-684
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    • 2011
  • In this paper, the relationship of potential and charge distribution in channel for double gate(DG) MOSFET has been derived from Poisson's equation using Gaussian function. The subthreshold swing has been investigated according to projected range and standard projected deviation, variables of Gaussian function. The analytical potential distribution model has been derived from Poisson's equation, and subthreshold swing has been obtained from this model. The subthreshold swing has been defined as the derivative of gate voltage to drain current and is theoretically minimum of 60mS/dec, and very important factor in digital application. Those results of this potential model are compared with those of numerical simulation to verify this model. As a result, since potential model presented in this paper is good agreement with numerical model, the subthreshold swings have been analyzed according to the shape of Gaussian function.

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Analysis of Subthreshold Swing Mechanism by Device Parameter of Asymmetric Double Gate MOSFET (소자 파라미터에 따른 비대칭 DGMOSFET의 문턱전압이하 스윙 분석)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.1
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    • pp.156-162
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    • 2015
  • This paper has analyzed how conduction path and electron concentration for the device parameters such as oxide thickness, channel doping, and top and bottom gate voltage influence on subthreshold swing of asymmetric double gate MOSFET. Compared with symmetric and asymmetric double gate MOSFET, asymmetric double gate MOSFET has the advantage that the factors to be able to control the short channel effects increase since top and bottom gate oxide thickness and voltages can be set differently. Therefore the conduction path and electron concentration for top and bottom gate oxide thickness and voltages are investigated, and it is found the optimum conditions that the degradation of subthreshold swing, severe short channel effects, can reduce. To obtain the analytical subthreshold swing, the analytical potential distribution is derived from Possion's equation. As a result, conduction path and electron concentration are greatly changed for device parameters, and subthreshold swing is influenced by conduction path and electron concentration of top and bottom.

표면효과에 의한 Si 나노와이어의 전류 전압 특성

  • Park, Seong-Ju;Go, Jae-U;Lee, Seon-Hong;Baek, In-Bok;Lee, Seong-Jae;Jang, Mun-Gyu
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.409-409
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    • 2012
  • 최근 나노크기의 미세구조 가공기술이 발달함에 따라 다양한 응용을 위한 나노소재/구조가 활발히 연구 되고 있다[1]. 그 중에서 실리콘 나노선은 태양전지, 메모리, 트랜지스터 그리고 광 공진기에 쓰일 수 있는 소재로서 기존의 실리콘 가공기술을 바로 사용할 수 있을 뿐 아니라[2], 비용 면에서 탁월한 잇점이 있기 때문에 주목 받고 있는 소재이다. 실리콘 나노선의 물리적 특성을 연구하기 위한 많은 연구가 진행되었지만, 매우 작은 크기와 높은 표면적-부피비율로 인해 생긴 독특한 특징을 완전히 이해하기에는 아직 부족한 점이 많다. 실리콘 나노선의 전류-전압특성에 영향을 미치는 요소는 도핑농도, 표면상태, 채널의 크기 등으로 다양한데, 이번 연구에서는 실리콘 나노선의 표면환경이 공기와 물 두 종류로 매질에 접하고 있을 경우에 대하여 각각 전류-전압을 측정하였다. 물이 공기와 다른 점은 크게 두 가지로 볼 수 있다. 첫째로 물의 경우에는 물에 용해된 수소이온과의 화학반응을 통하여 실리콘 표면전하가 유도되며 pH 값에 민감하게 변화한다. 둘째로 물의 유전율은 공기의 80배로서 표면부근에서의 전기장분포가 많이 왜곡된다. 이를 위하여 SOI를 기반으로 채널길이 $5{\mu}s$, 두께 40 nm, 너비 100 nm인 실리콘 나노선을 일반적인 반도체공정을 사용하여 제작하였다. 나노선의 전기적 특성 실험은 Semiconductor Parameter Analyzer (Agilent, 4155C)를 사용하여 전류-전압특성을 표면 상태를 변화시키면서 측정하였다. 실험을 통해 실리콘 나노선은 물과 공기 두 가지 표면환경에 따라 전류-전압특성이 확연히 변화하는 것을 볼 수 있었다. 동일한 전압 바이어스에서 표면에 물이 있을 때가 공기 있을 때 보다 훨씬 증가한 전류를 얻을 수 있었고(3V에서 약 2배), 비선형적인 전류-전압특성이 나타남을 관찰하였다. 본 발표에서는 이러한 실험결과를 표면에서의 전하와 정전기적인 효과로서 정성적으로 설명하고, 전산모사결과와 비교분석 하고자 한다.

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Analytical Formula of the Excess Noise in Homogeneous Semiconductors (균질 반도체의 과잉 잡음에 관한 해석적 식)

  • Park, Chan-Hyeong;Hong, Sung-Min;Min, Hong-Shick;Park, Young-June
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.9
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    • pp.8-13
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    • 2008
  • Noise in homogeneous extrinsic semiconductor samples is calculated due to distributed diffusion noise sources. As the length of the device shrinks at a fixed bias voltage, the ac-wise short-circuit noise current shows excess noise as well as thermal noise spectra. This excess noise behaves like a full shot noise when the channel length becomes very small compared with the extrinsic Debye length. For the first time, the analytic formula of the excess noise in extrinsic semiconductors from velocity-fluctuation noise sources is given for finite frequencies. This formula shows the interplay between transit time, dielectric relaxation time, and velocity relaxation time in determining the terminal noise current as well as the carrier density fluctuation. As frequency increases, the power spectral density of the excess noise rolls off. This formula sheds light on noise in nanoscale MOSFETs where quasi-ballistic transport plays an important role in carrier transport and noise.

Influence on Short Channel Effects by Tunneling for Nano structure Double Gate MOSFET (나노구조 이중게이트 MOSFET에서 터널링이 단채널효과에 미치는 영향)

  • Jung, Hak-Kee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.3
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    • pp.479-485
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    • 2006
  • The double gate(DG) MOSFET is a promising candidate to further extend the CMOS scaling and provide better control of short channel effect(SCE). DGMOSFETs, having ultra thin undoped Si channel for SCEs control, ale being validated for sub-20nm scaling. A novel analytical transport model for the subthreshold mode of DGMOSFETs is proposed in this paper. The model enables analysis of short channel effect such as the subthreshold swing(SS), the threshold voltage roil-off$({\Delta}V_{th})$ and the drain induced barrier lowering(DIBL). The proposed model includes the effects of thermionic emission and quantum tunneling of carriers through the source-drain barrier. An approximative solution of the 2D Poisson equation is used for the distribution of electric potential, and Wentzel-Kramers-Brillouin approximation is used for the tunneling probability. The new model is used to investigate the subthreshold characteristics of a double gate MOSFET having the gate length in the nanometer range $(5-20{\sim}nm)$ with ultra thin gate oxide and channel thickness. The model is verified by comparing the subthreshold swing and the threshold voltage roll-off with 2D numerical simulations. The proposed model is used to design contours for gate length, channel thickness, and gate oxide thickness.