• Journal of Korea Multimedia Society
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• v.12 no.1
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• pp.107-121
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• 2009

First reason for generation of standby power is because starting voltage must pass through from the source of electricity to IC. The second reason is due to current when IC is in operation. Purpose of this abstract is on structures of simple modules that automatically switch on or off through analysis of state on standby power and analysis of cutoff point patterns as well as application of algorithms. To achieve this, this paper is based on analysis of electric signals and modeling. Also, on/off cutoff criteria has been established for reduction of standby power. To find on/off cutoff point, that is executed algorithm of similar group and leading pattern group generation in the standby power state. Therefore, the algorithm was defined as an important parameter of the subtraction value of calculated between $1^{st}$ SCS, $2^{nd}$ SCS, and the median value of sampling coefficient per second from a wall outlet.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.27 no.4
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• pp.961-970
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• 2017

The differential power analysis calculates the intermediate value related to sensitive information and substitute into the power model to obtain (hypothesized) power consumption. After analyzing the calculated power consumption and measuring power consumption, the secret information value can be obtained. Hamming weight and hamming distance models are most commonly used power consumption model, and the power consumption model is obtained through the modeling technique. If the power consumption model assumed by the actual equipment differs from the power consumption of the actual equipment, the side channel analysis performance is declined. In this paper, we propose a method that records measured power consumption and exploits as power consumption model. The proposed method uses the power consumption at the time when the information (plain text, cipher text, etc.) available in the encryption process. The proposed method does not need template in advance and uses the power consumption measured by the actual equipment, so it accurately reflects the power consumption model of the equipment.. Simulation and experiments show that by using our proposed method, side channel analysis is improved on the existing power modeling method.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.32 no.2
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• pp.155-162
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• 2022

The SITM (See-In-The-Middle) attack proposed in CHES 2020 is a type of analysis technique that combines differential cryptanalysis and side-channel analysis, and can be applied even in a harsh environment with a low SNR (Signal-to-Noise Ratio). This attack targets partial 1^st or higher order masked block cipher, and uses unmasked middle round weakness. PRESENT is a lightweight blockcipher proposed in CHES 2007, designed to be implemented efficiently in a low-power environment. In this paper, we propose SITM attacks on 14-round masked implementation of PRESENT while the previous attacks were applicable to 4-round masked implementation of PRESENT. This indicates that PRESENT has to be implemented with more than 16-round masking to be resistant to our attacks.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.19 no.4
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• pp.21-28
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• 2009

In the recent years, power attacks were widely investigated, and so various countermeasures have been proposed, In the case of block ciphers, masking methods that blind the intermediate values in the algorithm computations(encryption, decryption, and key-schedule) are well-known among these countermeasures. But the cost of non-linear part is extremely high in the masking method of block cipher, and so the inversion of S-box is the most significant part in the case of AES. This fact make various countermeasures be proposed for reducing the cost of masking inversion and Zakeri's method using normal bases over the composite field is known to be most efficient algorithm among these masking method. We rearrange the masking inversion operation over the composite field and so can find duplicated multiplications. Because of these duplicated multiplications, our method can reduce about 10.5% gates in comparison with Zakeri's method.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.18 no.2
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• pp.39-47
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• 2008

Among previous Side Channel Analysis (SCA) methods, Differential Power Analysis (DPA) based on the statistical characteristics of collected signals has been known as an efficient attack for uncovering secret key of cryptosystems. However, the attack performance of this method is affected very much by the temporal misalignment and noise of collected side channel signals. In this paper, we propose a new method to surmount the noise problem in DPA. The performance of the proposed method is then evaluated while analyzing the power consumption signals of Micro-controller chips during a DES operation. Its performance is then compared to that of the original DPA in the time and frequency domains. When we compare the experimental results with respect to the needed number of traces to uncover the secret key, our proposed method shows the performance enhancement 33% in the time domain and 50% in the frequency domain.

• Journal of the Korea Society of Computer and Information
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• v.27 no.1
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• pp.43-50
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• 2022

Correlation Power Analysis(CPA) is a sub-channel attack method that measures the detailed power consumption of attack target equipment equipped with cryptographic algorithms and guesses the secret key used in cryptographic algorithms with more than 90% probability. Since CPA performs analysis based on statistics, a large amount of data is necessarily required. Therefore, the CPA must measure power consumption for at least about 15 minutes for each attack. In this paper proposes a method of using a Convolutional Neural Network(CNN) capable of accumulating input data and predicting results to solve the data collection problem of CPA. By collecting and learning the power consumption of the target equipment in advance, entering any power consumption can immediately estimate the secret key, improving the computational speed and 96.7% of the secret key estimation accuracy.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.32 no.4
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• pp.607-615
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• 2022

The SITM (See-In-The-Middle) proposed in CHES 2020 is a methodology for side-channel assisted differential cryptanalysis. This technique analyzes the power traces of unmasked middle rounds in partial masked SPN block cipher implementation, and performs differential analysis with the side channel information. Blockcipher GIFT is a lightweight blockcipher proposed in CHES 2017, designed to correct the well-known weaknesses of block cipher PRESENT and provide the efficient implementation. In this paper, we propose SITM attacks on partial masked implementation of GIFT-128. This attack targets 4-round and 6-round masked implementation of GIFT-128 and time/data complexity is 2^14.01 /2^14.01, 2¹⁶ /2¹⁶. In this paper, we compare the masterkey recovery logic available in SITM attacks, establishing a criterion for selecting more efficient logic depending on the situation. Finally, We introduce how to apply the this attack to GIFT-COFB, one of the finalist candidates in NIST lightweight cryptography standardization process.

• Proceedings of the Korea Information Processing Society Conference
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• 2013.05a
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• pp.675-678
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• 2013

암호 알고리즘이 탑재된 환경에서 암호 알고리즘의 이론적 안전성이 고려되어도 환경에 의존한 부가적 정보를 활용하는 부채널 분석에 대한 안전성이 검토되어야 한다. 최근까지 부채널 분석에 대한 안전성을 고려한 대응기법으로 마스킹 기법이 적용되었으나, 이와는 상반된 개념인 하드웨어 DPL(Dual-rail with Precharge Logic) 기법을 응용한 균일한 해밍웨이트를 제공하는 소프트웨어 AES(Advanced Encryption Standard)가 제안되었다. 최근, 소프트웨어 기반 블록암호에 대해 고차 마스킹 부채널 대응법의 비효율성으로 새로운 방법에 대한 다양한 시도가 되고 있으며, 그 중 균일한 해밍웨이트를 제공하는 표현 방법이 효율적이고 안전한 새로운 대응법으로 검토되어지고 있다. 하지만, 논문에서는 균일한 해밍웨이트 데이터 표현방법 기반 부채널 대응법을 해독하는 차분전력분석 방법을 소개한다. 실험을 통해, AES 128비트 키 중 일부분이 분석됨을 확인하였다. 이는 공격자가 테이블 변환 정보를 활용할 수 있다는 다소 강력한 가정하에 실험하였기 때문이다. 앞선 가정 하에 안전성을 제공하기 위해서는 차후 추가적 대응기법이 고려되어야 한다.

• Proceedings of the IEEK Conference
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• 2003.07d
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• pp.1399-1402
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• 2003

Paul Hocker has developed new attacks based on the electric consumption of cryptographic device such as smartcard that performs cryptographic computation. Among those attacks, the Differential Power Analysis(DPA) is one of the most impressive and most difficult to avoid. By analysing the power dissipation of encryption in a device, the secret information inside can be deduced. This paper presents that Advanced Encryption Standard(AES) is highly vulnerable to DPA and readily leaks away all secret keys through the experimental results for DPA. After all, it is required an implementation of the AES algorithm that is not vulnerable to DPA. We also propose countermeasures that employ asynchronous circuit.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.879-882
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• 2003

Differential Power Analysis(DPA) is powerful attack method for smart card. Self-timed circuit has several advantages resisting to DPA. In that reason, DPA countermeasure using self-timed circuit is thought as one of good solution for DPA prevention. In this paper, we examine what self-timed features are good against DPA, and how much we can get benefit from it. Also we test several self-timed circuit implementation style in order to compare DPA resistance factor. Simulation results show that self-timed circuit is more resistant to DPA than conventional synchronous circuit, and can be used for designing cryptographic hardware for smart-card.