• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.6
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• pp.290-297
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• 2014

The synchronization of OFDM receiver is consisted of symbol timing offset(STO) estimation in time domain and carrier frequency offset(CFO) estimation in frequency domain. This paper proposes new algorithm for correcting the integer CFO after we have done correcting the STO and partial CFO. ICFO must be corrected, since the ICFO lead to degrade bit error rate(BER) of demodulation performance. The PN sequence has information which is subcarrier order since the modified PN sequence, length is same subcarrier, is used in this paper and is modulated each subcarrier by each chip. Thus the receiver track phase of PN sequence after FFTin order to find the subcarrier frequency offset. The proposed algorithm is faster and more simple than convenient methode as measuring carrier energy.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.18 no.3
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• pp.215-221
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• 2018

In this paper, a comprehensive design of HBC(Human Body Communication) system for capsule endoscope is presented. First, we propose a method of combining the signals received from multiple patches attached to the body of patient through differential operation and derive the signal SNR mathematically. To synchronize HBC transmission signal sent from capsule, we analyzed coarse timing synchronization method using PN code and fine timing synchronization performance among Manchester, NRZ and RZ modulation method using ZCD(Zero Crossing Detector). In addition, we evaluated the equalization performance of HBC signal frame in Rician and Rayleigh channel environments by applying LMS and RLS algorithm.

• Journal of the Institute of Convergence Signal Processing
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• v.3 no.2
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• pp.37-44
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• 2002

In this paper, the Viterbi decoder containing new branch metrics of the squared Euclidean distance with multiple order phase differences is introduced in order to improve the bit error rate (BER) in the differential detection of the trellis-coded MDPSK-DFDM. The proposed Viterbi decoder is conceptually same as the sliding multiple phase differential detection method that uses the branch metric with multiple phase differences. Also, we describe the Viterbi algorithm in order to use this branch metrics. Our study shows that such a Viterbi decoder improves BER peformance without sacrificing bandwidth and power efficiency. Also, the proposed algorithm can be used in the single carrier modulation.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.05a
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• pp.568-573
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• 2002

In this paper, the Viterbi decoder containing new branch metrics of the squared Euclidean distance with multiple order phase differences is introduced in order to improve the bit error rate (BER) in the differential detection of the trellis-coded MDPSK-OFDM. The proposed Viterbi decoder is conceptually same as the Continuous multiple phase differential detection method that uses the branch metric with multiple phase differences. Also, we describe the Viterbi algorithm in order to use this branch metrics. Our study shows that such a Viterbi decoder improves BER performance without sacrificing bandwidth and power efficiency Also. the proposed algorithm ran be used in the single carrier modulation.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.11
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• pp.83-91
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• 1990

VOC(coltage controlled oscillator) circuits are necessary in applications such at the demodul-ation of FM signals, frequency synthesizer, and for clock recovery from digital data. In this paper, we designed the VCO circuit based on a OTA(operational transconductance amplifier) and the OP amp which using a differential amplifier by BiCMOS circuit. It consists of a OTA, voltage contorolled integrator and a schmitt trigger. Conventional VCO circuits are designed using the CMOS circuit, but in this paper we designed newly BiCMOS VCO circuit which has a good drive avlity, As a result of SPICE simulation, output frequency is 141KHz at 105KHz, and sensitivity is 15KHz.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.7 s.361
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• pp.41-46
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• 2007

A novel post-linearization technique is proposed for CMOS cascode low noise amplifier (LNA). The technique uses dual common gate FETs one of which delivers the linear currents to a load and the other one sinks the $3^{rd}$ order intermodulation currents of output currents from the common source FET. Selective current branching can be implemented in $0.18{\mu}m$ CMOS process by using a thick oxide FET as an IM3 sinker with a normal FET as a linear current buffer. A differential LNA adopting this technique is designed at 2.14GHz. The measurement results show 11dBm IIP3, 15.5dB power gain and 2.85dB noise figure consuming 12.4mA from 1.8V power supply. Compared with the LNA with turning off the IM3 sinker, the proposed technique improves the IIP3 by 7.5 dB.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.4B
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• pp.613-623
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• 2000

Digital TV tuner for 8-VSB modulation was developed with satisfying the requirements of ATSC. The double frequency conversion and the active tracking filter in the front-end were used to reduce interference of the adjacent channels and multi-channels, which suppress If beat and image band. However, it was impossible to get frequency mapping between tracking filter and first VCO(Voltage Controlled Oscillator) in the double conversion digital TV tuner differing from conventional NTSC tuner. This paper, therefore, suggests the available structure and a new method for automatic frequency selection by obtaining the mapping of frequency characteristic over tracking voltage and the combined hardware which compose of Micro-controller, EEPROM, D/A(Digital-to-Analog Converter), OP amp and switch driver to solve above problems.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.6
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• pp.18-26
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• 1999

This paper presents the architecture and design of a DSSS MODEM ASIC chip for wireless local area networks (WLAN). The implemented MODEM chip supports the DSSS physical layer specifications of the IEEE 802.11. The chip consits of a transmitter and a receiver which contain a CRC encoder/decoder, a differential encoder/decoder, a frequency offset compensator and a timing recovery circuit. The chip supports various data rates, i.e., 4,2 and 1Mbps and provides both DBPSK and DQPSK for data modulation. We have performed logic synthesis using the $SAMSUNG^{TM}$ $0.6{\mu}m$ gate array library and the implemented chip consists of 53,355 gates. The MODEM chip operates at 44MHz, the package type is 100-pin QFP and the power consumption is 1.2watt at 44MHz. The implemented MODEM architecture shows lower BER compared with the Harris HSP3824.

• The Journal of the Acoustical Society of Korea
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• v.35 no.5
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• pp.368-374
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• 2016

This paper presents constructing transmitter and receiver by using a direct sequence spread spectrum techniques to DPSK (Differential Phase-Shift Keying) scheme in underwater acoustic communication. Since DPSK signal can be demodulated if the receiver knows only the phase difference between the adjacent bits, DPSK receiver structure has the advantage of being simplified. In the conventional receiver, two adjacent symbols of transmitted signal before despread are passed to the transition correlator that detects data by comparing maximum correlation outputs. At this time, the error for maximum value of the correlator output may increase because of low SNR (Signal to Noise Ratio) or high Doppler shift frequency according to the underwater channel. In this paper, we propose a method for accurate detection result using the width as well as the magnitude among outputs produced by the correlator. The performances of the proposed method was evaluated by simulation and lake trial data.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.5
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• pp.560-567
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• 2011

In this paper, we reduced the optical noise interference using polarizers in a visible light communication system. In a transmitter, two light-emitting diodes(LEDs) are modulated synchronously by the original and the reversed signals of the transmitted data, and the two LED lights are radiated through orthogonal polarizers. In a receiver, two optical signals are detected through orthogonal polarizers and differentially amplified to remove the optical noise. In an environment that noise light from a fluorescent lamp is much stronger than the signal, the receiver with orthogonal polarizers removed the 120 Hz noise, and synchronous light transmission of the original and the reversed signals using two LEDs reduced the illumination flickering to about one-eighth that using one LED.