• Title/Summary/Keyword: 지연시간 계산

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Improvement of Delay and Noise Characteristics by Buffer Insertion (버퍼 삽입을 이용한 Delay와 Noise 특성 개선을 위한 연구)

  • You, Man-Sung;Shin, Hyun-Chul
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.6
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    • pp.81-90
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    • 2004
  • For deep submicron (DSM) very large scale integrated circuits (VLSI), it is well known that interconnects have become the dominant factor in determining the overall circuit performance. Buffer insertion is an effective technique of interconnect optimization. When a net has an excessive propagation delay, one or more buffers can be inserted to reduce the delay. Buffers also reduce the crosstalk between neighboring wires. While many conventional methods insert buffers net by net. we have developed new techniques in which buffer locations are simultaneously optimized for all nets. This is to avoid the difficulties in finding the right ordering of nets for buffer insertion. since several nets may compete for a buffer location. We also study buffer insertion with multiple fan-out nets to optimize critical path delay. Elmore delay model is used for delay calculation and the number of buffers for each net is determined to optimize the delay.

Analysis of Delay-Bandwidth Normalization Characteristic in Decay Usage Algorithm of UNIX (UNIX의 Decay Usage 알고리즘에서의 지연시간-사용량 정규화 특성 분석)

  • Park, Kyeong-Ho;Hwang, Ho-Young;Lee, Chang-Gun;Min, Sang-Lyul
    • Journal of KIISE:Computer Systems and Theory
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    • v.34 no.10
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    • pp.511-520
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    • 2007
  • Decay usage scheduling algorithm gives preference to processes that have consumed little CPU in the recent past. It has been widely-used in time-sharing systems such as UNIX, where CPU-intensive processes and interactive processes are mixed. However, there has been no sound understanding about the mixed effects of decay usage parameters on the service performance. This paper empirically analyzes their effects in terms of the resulting service bandwidth and delay Based on such empirical analysis, we derive the clear meaning of each parameter. Such analysis and understanding provides a basis of controlling decay usage parameters for desirable service provision as required by applications.

A Delayed Preemption Scheduling for Supporting Blocked Algorithm on Multiprogramming Environment (다중 프로그램 환경에서 블록화 알고리즘을 지원하기 위한 지연 선점 스케줄링)

  • Jeong, In-Beom;Lee, Jun-Won
    • Journal of KIISE:Computer Systems and Theory
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    • v.26 no.3
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    • pp.324-332
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    • 1999
  • 다중 프로그래밍 환경에서 운영체제는 시스템의 시간 할당량에 따라서 프로세스들에 대하여 문맥교환을 수행한다. 문맥교환은 현재 수행중인 프로세스 문맥의 저장과 다음에 수행되는 프로세스 문맥의 적재라는 비용 뿐만 아니라 캐쉬 메모리의 커다란 영향을 미친다. 특히 블록화 알고리즘은 사용하는 프로그램들은 재사용되기 위하여 캐쉬 메모리에 적재된 블록화 요소가 프로그램들의 문맥 교환사이에 다른 프로그램들에 의하여 손상되는 경우 프로그램의 캐쉬 성능이 크게 떨어진다. 본 논문에서는 하나의 블록화 요소에 대한 계산이 완료될 때까지 운영체제가 문맥 교환을 지연시키는 지연된 선점 스케쥴링 방법을 제안한다. 모의 시험을 통하여 지연된 선점 스케줄링을 사용할 경우 블록화 알고리즘을 사용한 프로그램들은 재사용되기 위하여 캐쉬 메모리에 적재된 블록화 요소가 프로그램들의 문맥 교환 사이에 다른 프로그램들에 의하여 손상되는 경우 프로그램의 캐쉬 성능이 크게 떨어지게 된다. 본 논문에서는 하나의 블록화 요소에 대한 계산이 완료될 때까지 운영체제가 문맥 교환을 지연시키는 지연된 선점 스케쥴링 방법을 제안한다. 모의 시험을 통하여 지연된 선점 스케줄링을 사용할 경우 블록화 알고리즘을 사용한 프로그램은 캐쉬 메모리에 적재된 블록화 요소를 문맥 교환으로부터 보호 받으므로 향상된 캐쉬성능을 나타냄을 보인다.

Transient Response Analysis of the Trigonometric Distributed RC Circuit (삼각함수형 RC분포회로의 과도응답해석)

  • 김덕진
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.4 no.4
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    • pp.13-18
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    • 1967
  • Since all the poles of the open circuit voltage transfer function of the trigonometric, linear, passive RC circuits exist on the negative real axis of s-plane, its transient response to the unit step input is monotonic. This satisfies the necessary conditions for the applicability of Elmore's method which had been developed originally for the transient analysis of lumped circuit in computing the rise time and delay time of the trigonometric distributed RC circuits. This paper describes the computing method of rise and delay times of the trigonometric distributed RC circuit. The analysis shows that the transient response of this kind circuit depends only upon the time constant and distance angle $\theta$. As $\theta$ is increased, the rise and delay titles are increased non-linearly.

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TOA-Based Ranging Method using CRS in LTE Signals (LTE 신호의 CRS를 이용한 TOA 기반 거리 측정 방법)

  • Kang, Taewon;Lee, Halim;Seo, Jiwon
    • Journal of Advanced Navigation Technology
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    • v.23 no.5
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    • pp.437-443
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    • 2019
  • In this paper, a new algorithm for the calculation of the range between an LTE base station (BS) and a user equipment (UE) using time-of-arrival (TOA) measurements of LTE signals is proposed. First, the cell identity (cell ID) of the received signal is acquired using the primary synchronization signal (PSS) and secondary synchronization signal (SSS) to identify the BS transmitted the signal. The proposed algorithm exploits the cell-specific reference signal (CRS), the reference sequence inserted in commercial LTE signals, to estimate the time delay using 2D cross-correlation. The obtained TOA estimations can be used to calculate the range employed from the known BS location. The performance of the proposed algorithm is evaluated with the experiment performed using real LTE signals transmitted from the commercial BS.

Sea Surface Temperature Time Lag Due to the Extreme Heat Wave of August 2016 (2016년 8월 폭염에 따른 표층수온의 지연시간 고찰)

  • Kim, Ju-Yeon;Han, In-Seong
    • Journal of the Korean Society of Marine Environment & Safety
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    • v.23 no.6
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    • pp.677-683
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    • 2017
  • In this study, we examined responses to Sea Surface Temperature (SST) as the result of an intensive heat wave that took place in August 2016 and the cross correlation between SST and Air Temperature (AT) in August 2016. The data used included the SST of 8 ocean buoys, provided by the National Institute of Fisheries Science, and the AT of AWS near those 8 ocean buoys recorded every hour. To identify an appropriate data period, on FIR filter was applied. Two locations in the south sea were selected to be observed over similar a period, with a high correlation coefficient of about 0.8 and a time lag of about 50 hours between AT and SST. For the yellow sea, due to shallow waters and tidal currents, SST showed a rapid response caused by changes in AT. The east sea showed a negative correlation between AT and SST because of significant water depth and marine environment factors. By identifying the time lag between AT and SST, damage to aquatic organisms can be minimized, and we expect to develop a rapid response system for damage to the fishery industry caused by extreme heat waves.

An Excess-3 Code Adde $r_{}$tracter Design Decimal Computation (십진수 계산을 위한 3초과 부호 가감산기 설계)

  • 최종화;한선경;유영갑
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.40 no.6
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    • pp.32-38
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    • 2003
  • An excess-3 code adde $r_tracter circuit is proposed for human friendly decimal computation. Carry lookahead (CLA) circuitry can be used to enhance decimal computation speed. The proposed excess-3 adde $r_tracter employs improved CLA and compensation circuitry recoding computation delay. The circuitry used for addition is used for subtraction without further modification. Substantial speed improvement is obtained compared to conventional designs.signs.

Performance Analysis of Voice over ATM using AAL2 based on Packet Delay Evaluation (ATM망에서 AAL2를 이용한 음성패킷 전송에 관한 성능분석)

  • 김원순;김태준;홍석원;오창석
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.10B
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    • pp.1852-1860
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    • 1999
  • This paper studied performance of the AAL2 for variable rate real time services in ATM network with discrete-time simulation model. In this simulation, input parameters are packet fill delay for AAL2 PDU generation, guard time for ATM cell generation, burstness and number of channels. Though variation of the above mentioned parameters, we obtained end-to end delay variations and throughput, analyzed performance effect of the each parameter for voice packet service.

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Signal Parameter Estimation via Transfer Matrix Analysis (전달 행렬 분석에 의한 신호변수 추정 기법 연구)

  • 조운현
    • The Journal of the Acoustical Society of Korea
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    • v.17 no.4
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    • pp.82-87
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    • 1998
  • 여러 음원들에 의해 형성된 파동장내에서 각 신호음의 주파수 특성과 시간 지연 (time delay)을 추정할 수 있는 알고리즘을 개발하였다. 이 알고리즘의 관련 수식은 두 개의 상호 간섭하는 신호가 입사하고 여기에 주변 환경에 의한 랜덤 잡음이 첨가된다고 가정하여 유도되었으며 두 개 이상의 신호음이 있는 상황에 대해 확장이 가능하다. 본 논문에서 시간 지연이 일정한 수신 신호 영역에 등간격으로 놓여진 수신기로부터 각 센서에 수신된 신호의 스펙트럼은 M개의 센서에 대해 K개의 음원 스펙트럼과 K개의 조정 벡터(steering vector) 의 선형 조합(linear combination)으로 주파수에서 모델된다. 각 음원의 주파수 특성과 음원 으로 들어오는 신호의 입사각을 결정하기 위하여 본 알고리즘은 전달 행렬(transfer matrix) 을 계산하고 그 전달 행렬의 고유값(eigenvalue)과 고유벡터(eigenvector)를 분석한다. 이 고 유값들은 복소수이며 그 크기는 진폭 변환 계수를 결정한다. 위상은 수신기의 간격으로부터 시간 지연을 결정하는 기울기를 갖는 주파수의 선형 함수이다. 전달 행렬에의 입력 자료들 은 동일 간격 소자간의 cross-power spectra이다.

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Analysis for the Stability of a Haptic System with the Computational Time-varying Delay (가변적인 계산시간지연에 의한 햅틱 시스템에서의 안정성 영향 분석)

  • Lee, Kyungno
    • Journal of Institute of Convergence Technology
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    • v.5 no.2
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    • pp.37-42
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    • 2015
  • This paper presents the effects of the computational time-varying delay on the stability of the haptic system that includes a virtual wall and a first-order-hold method. The model of a haptic system includes a haptic device model with a mass and a damper, a virtual wall model, a first-order-hold model and a computational time-varying delay model. In this paper, the maximum of the computational time-varying delay is assumed to be as much as the sampling time. Using the simulation, it is analyzed how the sample-hold methods and the computational time-varying delay affect the maximum available stiffness. As the maximum of computational time-varying delay increases, the maximal available stiffness of a virtual wall model is reduced.