• Title/Summary/Keyword: 주파수 변조 피드백

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A Research On the T-DMB Received Environment For the Efficient Reuse of the Band of VHF Frequency (VHF대역의 효율적 재활용을 위한 T-DMB 수신환경 조사)

  • Park, Sung-Kyu;Lee, Sang-Un;Chae, Su-Hyun;Park, Gooman
    • Journal of Broadcast Engineering
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    • v.21 no.5
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    • pp.726-738
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    • 2016
  • This study analyzed the properties of VHF band and suggested an efficient VHF band application plan for digital radio and UHDTV broadcasting through the experiment by the house T-DMB device in practical user environment. In order to find an efficient frequency band for digital radio broadcasting, this study examined first, to check the times of drop-out receive occurring in the audible area using a DMB/FM CAR Radio for T-DMB that has the characteristics of DAB. Second, this article explored the phenomenon of feedback loops in the same channel using a T-DMB house gap filler transmitting the signal by the same OFDM modulation scheme with UHDTV for configuring suitable SFN transmission network of the UHDTV broadcasting. Based on these experiments, this study suggested a suitable VHF band for digital radio and an efficient utilization of the VHF frequency band for the SFN network configuration of UHDTV.

Design of a DC-DC Step-Down Converter for LED Backlight of Mobile Devices (휴대기기용 LED 백라이트를 위한 감압형 DC-DC 변환기 설계)

  • Son, Hyun-Sik;Lee, Min-Ji;Park, Won-Kyoung;Song, Han-Jung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.15 no.3
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    • pp.1700-1706
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    • 2014
  • In this paper, a step down converter for LED backlight of mobile application has been proposed. The converter which is operated with 4 MHz high switching frequency is capable of reducing mounting area of passive devices consists of a power stage and a control block. Circuit elements of the power stage are inductor, output capacitor, MOS transistors and feedback resistors. The control block consists of pulse width modulator, error amplifier and oscillator etc. Proposed step down converter has been designed and verified using a $0.35{\mu}m$ 1-poly 4-metal BCD process technology. Simulation results show that the output voltage is 1.8 V in 3.7 V input voltage, output current 100 mA which is larger than 25 ~ 50 mA in conventional 500 KHz driven converter when the duty ratio is 0.4.

Design of a CCM/DCM dual mode DC-DC Buck Converter with Capacitor Multiplier (커패시터 멀티플라이어를 갖는 CCM/DCM 이중모드 DC-DC 벅 컨버터의 설계)

  • Choi, Jin-Woong;Song, Han-Jung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.17 no.9
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    • pp.21-26
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    • 2016
  • This paper presents a step-down DC-DC buck converter with a CCM/DCM dual-mode function for the internal power stage of portable electronic device. The proposed converter that is operated with a high frequency of 1 MHz consists of a power stage and a control block. The power stage has a power MOS transistor, inductor, capacitor, and feedback resistors for the control loop. The control part has a pulse width modulation (PWM) block, error amplifier, ramp generator, and oscillator. In this paper, an external capacitor for compensation has been replaced with a multiplier equivalent CMOS circuit for area reduction of integrated circuits. In addition, the circuit includes protection block, such as over voltage protection (OVP), under voltage lock out (UVLO), and thermal shutdown (TSD) block. The proposed circuit was designed and verified using a $0.18{\mu}m$ CMOS process parameter by Cadence Spectra circuit design program. The SPICE simulation results showed a peak efficiency of 94.8 %, a ripple voltage of 3.29 mV ripple, and a 1.8 V output voltage with supply voltages ranging from 2.7 to 3.3 V.