• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.5B
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• pp.378-389
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• 2006

An IP address lookup scheme has become a critical issue increasingly for high-speed networking techniques due to the advent of IPv6 based on 128bit. In this paper, a novel global IPv6 unicast address lookup scheme is proposed for next generation internet routers. The proposed scheme perform a variable multiple hashing based on prefix grouping. Accordingly, it should not only minimize overflows with the proper number of memory modules, but also reduce a memory size required to organize forwarding tables. It has the fast building and searching mechanisms for forwarding tables during only a single memory access. Besides, it is easy to update forwarding tables incrementally. In the simulation using CERNET routing data as a 6bone test phase, we compared the proposed scheme with a similar scheme using a uniform multiple hashing. As a result, we verified that the number of overflows is reduced by 50% and the size of memory for forwarding tables is shrunken by 15% with 8 tables.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.2B
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• pp.129-137
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• 2003

Multimedia streams, like MPEG continuously retrieve multimedia data because of their incessant playback. While these streams need an efficient support of kernel, the current buffer cache mechanism of Linux kernel such as Unix operating system was designed apt for small files, which is aperiodically requested as well as time uncritical. But, in case of continuous media, the CPU must enormously copy memory from kernel address space to user address space. This must lead to a large CPU overhead. This overhead both degrades system throughput and cannot guarantee QOS. In this paper, we have designed and implemented two memory copy reduction schemes in Linux kernel, direct I/O and one copy. The direct I/O skips the buffer cache layer of Linux kernel and results in dramatic reduction of CPU memory copy overhead. And, the one copy provides a fast disk-to-network data path without copying to user address space. The experimental results show considerable reduction of CPU overhead and throughput improvements.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.12C
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• pp.208-217
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• 2001

In mobile Internet environment, providing multicast requires much more complex mechanism comparing with the unicast Mobile IP routing protocol. This is because multicast datagrams are sent to a group address that do not belong to a specific network. The IETF Mobile IP suggested two approaches for mobile multicasting, namely remote subscription and hi-directional tunneling. In remote subscription, a mobile node may join a group via a local multicast router on the visited subnet. Therefore remote subscription may cause much datagram loss while reconstructing the delivery tee. In bi-directional tunneling, a mobile node may join a group via a hi-directional tunnel to its home agent. Bi-directional tunneling may suffer from inefficient routing. In this paper, we proposed a new mobile multicasting protocol, Mobile If Multicast using Local Broadcast(MIMLB) which can receive multicast datagrams as fast as possible and optimize routing path for multicast delivery. The MIMLB protocol uses hi-directional tunneling to receive multicast datagrams. And the MIMLB protocol can resolve datagram duplicated problem and optimize routing path by using local broadcast. Simulation results show that MIMLB reduces delivery path length and optimizes multicast routing path when a mobile nod? moves into a foreign network.

• Proceedings of the Korea Contents Association Conference
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• 2014.11a
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• pp.3-4
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• 2014

현대 운영 체제에서 가상 메모리 관리 기술은 응용 프로그램에게 가상의 큰 주소 공간을 제공하는 방법이다. 이러한 기술은 메인 메모리와 저장 장치를 이용하여 자주 접근되는 데이터는 메인 메모리에 덜 접근되는 데이터는 저장 장치에 저장한다. 본 연구는 차세대 저장 장치를 메모리 확장을 위한 장치로 가정했을 때의 성능 향상 기법을 제안한다. 본 연구진은 제안된 방법을 Linux 3.14.3을 구현하였고, 초고속 저장 장치를 이용하여 평가한 결과 기존 SWAP 시스템에 비해 20% 정도의 성능 향상 효과가 있음을 보였다.

• The KIPS Transactions:PartD
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• v.18D no.3
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• pp.157-168
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• 2011

Recently flash memory has been being utilized as a main storage device in mobile devices, and flashSSDs are getting popularity as a major storage device in laptop and desktop computers, and even in enterprise-level server machines. Unlike HDDs, on flash memory, the overwrite operation is not able to be performed unless it is preceded by the erase operation to the same block. To address this, FTL(Flash memory Translation Layer) is employed on flash memory. Even though the modified data block is overwritten to the same logical address, FTL writes the updated data block to the different physical address from the previous one, mapping the logical address to the new physical address. This enables flash memory to avoid the high block-erase cost. A flashSSD has an array of NAND flash memory packages so it can access one or more flash memory packages in parallel at once. To take advantage of the internal parallelism of flashSSDs, it is beneficial for DBMSs to request I/O operations on sequential logical addresses. However, the B-tree structure, which is a representative index scheme of current relational DBMSs, produces excessive I/O operations in random order when its node structures are updated. Therefore, the original b-tree is not favorable to SSD. In this paper, we propose AS(Always Sequential) B-tree that writes the updated node contiguously to the previously written node in the logical address for every update operation. In the experiments, AS B-tree enhanced 21% of B-tree's insertion performance.

• The KIPS Transactions:PartA
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• v.12A no.1 s.91
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• pp.41-52
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• 2005

Memory reference instruction caused by cache miss is the critical factor that limits the processing power of processor. Cache prefetching technique is an effective way to reduce the latency due to memory access. However, excessively aggressive prefetch leads to cache pollution and finally to cancel out the advantage of prefetch. In this study, an active prefetch filtering scheme is introduced which dynamically decides whether to commence prefetching after referring a filtering table to reduce the cache pollution due to unnecessary prefetches. For the precision filtering, an evicted address referencing scheme has been proposed where the filter directly compares the current prefetch address with previous unnecessary prefetch addresses stored in filtering table. Moreover, a small sized exclusive prefetch cache has been introduced to increase the amount of eviction of unnecessarily prefetched addresses to enhance the accuracy of dynamic filtering. The exclusive prefetch cache also prevents useful demand data from being pushed out by prefetched data, while the evicted address direct referencing scheme enables the prefetch cache to keep most of useful prefetch data within its small size. Experimental results from commonly used general and multimedia benchmarks show that the average cache miss ratio has been decreased by $13.3{\%}$ by virtue of enhanced filtering accuracy compared with conventional schemes.

• The Transactions of the Korea Information Processing Society
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• v.5 no.11
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• pp.2835-2844
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• 1998

Most data parallel languages provide the block-cyclic distribution (cyclic(k)) that is one of the most general regular distributions. In order to generate local addresses for an array section A(l:h:s) with block-cyclic distribution, efficient compiling methods or run-time methods are required. In this paper, two local address generation methods for the block-cyclic distribution are presented. One is a simple scan method that is modified from the virtual-block scheme. The other is a linear-time ${\Delta}M$ table that contains the local memory access information construction method. This method is simpler than other algorithms for generating a ${\Delta}M$ table. Experimental results show that a simple that a simple scan method has poor performance but a linear-time ${\Delta}M$ table generation method is faster than other algorithms in ${\Delta}M$ table generation time and access time for 10,000 array elements.

• Journal of KIISE:Computer Systems and Theory
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• v.27 no.7
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• pp.665-674
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• 2000

In data parallel programs incurring high cache locality, the choice of grain sizes affects cache performance. Though the grain sizes chosen provide fair load balance among processors, the grain sizes that ignore underlying caching effect result in address interferences between grains allocated to a processor. These address interferences appear to have a negative impact on the cache locality, since they result in cache conflict misses. To address this problem, we propose a best grain size driven from a cache size and the number of processors based on direct mapped cache's characteristic. Since the proposed method does not map the grains to the same location in the cache, cache conflict misses are reduced. Simulation results show that the proposed best grain size substantially improves the performance of tested data parallel programs through the reduction of cache misses on direct-mapped caches.

• Journal of Korea Multimedia Society
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• v.5 no.3
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• pp.307-315
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• 2002

As growing the population of the Internet, e-mail should provide various types of media, and the size of e-mail including multimedia data becomes larger and larger Furthermore, the multimedia e-mail has been used through various communication terminals including mobile devices. The main objectives of this thesis is designing and Implementing efficient mail server which should provide high performance and scalability in terms of storage capacity and the number of mail users. This thesis proposes a cluster-based mail server architecture which has a load-balance node using. If address forwarding for distributing incoming mail messages into distributed mail server nodes.

• Journal of the Korean Geophysical Society
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• v.4 no.4
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• pp.239-249
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• 2001

NAT (Network Address Translation) is an IP address modification protocol that translates private IP addresses into authentic Internet addresses. The main features of NAT are to improve network security and to save IP addresses. Generally speaking, in order to perform its functionality. NAT uses the address informaiton in the packet header. Certain application protocols, however, use the information in the packet data as well as the imformation in the packet header to perform end-to-end communication. Therefor, to support these types of application protocols, NAT should be able to perform appropriate translation of protocol information in the packet data. In this thesis, we design and implement a method which translates virtual IP information in the packet data into real IP information by using port proxy server.