• Journal of IKEEE
• /
• v.27 no.3
• /
• pp.319-326
• /
• 2023

In this paper, simulation and experimental results are presented, including the implementation of a digital controller for robust output voltage control of a single-phase voltage source inverters (VSIs) and total harmonic distortion (T.H.D.v) analysis. Typically, the VSIs uses a proportional integral (PI) controller for the current controller on the inner loop and a proportional resonant (PR) controller for the voltage controller on the outer loop to control the output voltage. However, non-linear loads still produce high-order odd harmonic distortion. Therefore, in this paper, a proportional multiple resonance (PMR) controller with a resonance controller for odd harmonic frequencies is proposed to suppress harmonic distortion. Analyze the frequency response of controllers for VSI plants and design PMR controllers. Through simulation, the total harmonic distortion characteristics of the output voltage are compared and verified when PI and PMR are used as voltage controllers. Both linear and non-linear loading conditions were considered. Finally, the effectiveness of the PMR controller was demonstrated by applying it to a 3kW VSIs prototype.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.42 no.4
• /
• pp.864-870
• /
• 2017

This paper describes a Dual Buck Converter with mode control using variable Frequency to Voltage for portable devices requiring wide load current. The inherent problems of PLL compensation and efficiency degradation in light load current that the conventional hysteretic buck converter has faced have been resolved by using the proposed Dual buck converter which include improved PFM Mode not to require compensation. The proposed mode controller can also improve the difficulty of detecting the load change of the mode controller, which is the main circuit of the conventional dual mode buck converter, and the slow mode switching speed. the proposed mode controller has mode switching time of at least 1.5us. The proposed DC-DC buck converter was implemented by using $0.18{\mu}m$ CMOS process and die size was $1.38mm{\times}1.37mm$. The post simulation results with inductor and capacitor including parasitic elements showed that the proposed circuit received the input of 2.7~3.3V and generated output of 1.2V with the output ripple voltage had the PFM mode of 65mV and 16mV at the fixed switching frequency of 2MHz in hysteretic mode under load currents of 1~500mA. The maximum efficiency of the proposed dual-mode buck converter is 95% at 80mA and is more than 85% efficient under load currents of 1~500mA.

• Journal of Advanced Marine Engineering and Technology
• /
• v.37 no.6
• /
• pp.653-658
• /
• 2013

This paper describes a new sensorless speed control method for permanent magnet synchronous motor(PMSM) using direct torque control(DTC). The direct torque control offers fast torque response, lesser hardware and processing costs as compared to vector controlled drives. In this paper the current error compensation technique is applied for sensorless speed control of synchronous motor. Through this method, the controlled stator voltage is applied to the synchronous motor so that the error between stator currents of the mathematical model and the actual motor can be forced to decay to zero as time proceeds and therefore, the motor speed approaches to the setting value. Especially, any PI controllers are not necessary in this control method. The simulation results indicate good speed and load responses from the low speed range to the high.

• 한국태양에너지학회:학술대회논문집
• /
• 2012.03a
• /
• pp.325-330
• /
• 2012

A single-phase PVPCS(photovoltaic power conditioning system) that contains a single phase dc-ac inverter tends to draw an ac ripple current at twice the out frequency. Such a ripple current may shorten passive elements life span and worsen output current THD. As a result, it may reduce the efficiency of the whole PVPCS system. In this paper, the ripple current propagation is analyzed, and two methods to reduce the ripple current are proposed. Firslyt, this paper presents notch filter with IP voltage controller to reject specific current ripple in single-phase PVPCS. The notch filter can be designed that suppress just only specific frequency component and no phase delay. The proposed notch filter can suppress output command signal in the ripple bandwidth for reducing output current THD. Secondly, for reducing specific current ripple, the other method is feed-forward compensation to incorporate a current control loop in the dc-dc converter. The proposed notch filter and feed-forward compensation method have been verified with computer simulation and simulation results obtained demonstrate the validity of the proposed control scheme.

• Journal of the Institute of Convergence Signal Processing
• /
• v.8 no.2
• /
• pp.113-118
• /
• 2007

In this paper, a novel approach to using Subcircuit of Pspice in designing feedback for DC-DC converter systems is proposed. Proposed new approach, the feedback design procedures which are based on small signal modeling are programmed as a subcircuit in Pspice. For this purpose, Analog Behavioral Modeling (ABM) is used. By using the subcircuit, the component values of the error compensation amplifier can be easily obtained by means of Pspice DC analysis. The methodology of development is presented in detail and application examples demonstrated the effectiveness of the proposed approach in designing feedbacks for DC-DC converters. The converter with PWM method used continuous current mode and calculated buck converter control signal with average and linear current technique. To decide pole and zero K-method was adapted and this kind of design procedure took stable function.

• Journal of Korea Society of Industrial Information Systems
• /
• v.20 no.6
• /
• pp.29-36
• /
• 2015

This paper presents an LED backlight driver IC consisting of three linear current regulators and an output-voltage regulation loop with a self-adjustable reference voltage. In the proposed LED driver, the output voltage is controlled by dual feedback loops. The first loop senses and controls the output voltage, and the second loop senses the voltage drop of the linear current regulator and adjusts the reference voltage. With these feedback loops, the voltage drop of the linear current regulator is maintained at a minimum value, at which the driver efficiency is maximized. The output of the driver is a three-channel LED setup with four LEDs in each channel. The luminance is adjusted by the PWM dimming signal. The proposed driver is designed by a $0.35-{\mu}m$ 60-V high-voltage process, resulting in an experimental maximum efficiency of approximately 85%.

• Journal of IKEEE
• /
• v.26 no.2
• /
• pp.299-305
• /
• 2022

Analog-digital converter (ADC) should be one of the most important blocks that convert various physical signals to digital ones for signal processing in the digital signal domain. As most operations of the analog circuit for sensor signal processing have been replaced by digital circuits, high-resolution performance is required for ADC. In addition, low-power must be the critical issue in order to extend the battery time of mobile system. The existing integrating sigma-delta ADCs has a characteristic of high resolution, but due to its low supply voltage condition and advanced technology, circuit error and corresponding resolution degradation of ADC result from the finite gain of the operational amplifier in the integrator. Buffer compensation technique can be applied to minimize gain errors, but there is a disadvantage of additional power dissipation due to the added buffer. In this paper, incremental signal-delta ADC is proposed with buffer switching scheme to minimize current and igh-pass bias circuit to improve the settling time.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.46 no.8
• /
• pp.31-40
• /
• 2009

This paper presents a design of a high performance DC-DC boost converter as a power module for SOC designs. It applied to this chip that reduced inductor and capacitor for integrating on a chip, and it operates with a switching frequency of 100MHz. It has reliability and stability in high switching frequency. The controller of DC-DC boost converter is designed by voltage-mode control method and compensated properly. The designed DC-DC converter is fabricated with the 0.18${\mu}m$ standard CMOS technology with a thick-gate oxide option. The overall die size is 8.14$mm^2$, and controller size is 1.15$mm^2$. The converter has the maximum efficiency over 76% for the output voltage of 4V and load current larger 300mA. The load regulation is 0.012% (0.5mV) for the load current change of 100mA.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.21 no.10
• /
• pp.1-7
• /
• 2020

In recent years, as LED display systems are actively spread, study on effective control methods for an LED driver for driving the systems has been in progress. The most representative among them is the uniform brightness control method for the LED driver channel. In this paper, we propose an LED driver IC for BLU with current compensation and system protection functions to minimize channel luminance deviation. It is designed for current accuracy within ±3% between channels and a channel current of 150 mA. In order to satisfy the design specifications, the channel amplifier offset was canceled out by a chopping operation using a channel-driving PWM signal. Also, a pre-charge function was implemented to minimize the fast operation speed and luminance deviation between channels. LED error (open, short), switch TR short detection, and operating temperature protection circuits were designed to protect the IC and BLU systems. The proposed IC was fabricated using a Magnachip 0.35-um CMOS process and verified using Cadence and Synopsys' Design Tool. The fabricated LED driver IC has current accuracy within ±1.5% between channels and 150-mA channel output characteristics. The error detection circuits were verified by a test board.

• Journal of Advanced Navigation Technology
• /
• v.14 no.2
• /
• pp.176-182
• /
• 2010

This paper proposes that an inverse class-E amplifier is used a tunable parallel resonator at output port in order to maintain a high power-added efficiency(PAE) and output power with wide frequency ranges. A tunable circuit has a constant Q factor at operating frequency ranges and because of using varactor diode, the inductor and capacitor values of resonator can be changed. Also, the inductance value for zero-current switching (ZCS) is implemented a lumped element and the capacitance value is made a distributed element for phase compensation. The inverse class E amplifier using tunable parallel resonator is obtained to deliver 25dBm output power and achieve maximum power added efficiency(PAE) of 75% at 65-120MHz frequency ranges.