• Title/Summary/Keyword: 전류감지

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A Study on the Monitoring of Tool Fracture using Motor Current in Turning (선반가공에서 모터 전류를 이용한 공구 파손 감지에 관한 연구)

  • Youn, Jae-Woong;Kim, Hong-Seok;Kim, Seung-Gi
    • Journal of Korea Society of Industrial Information Systems
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    • v.21 no.4
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    • pp.43-53
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    • 2016
  • In this paper, monitoring method of tool fracture using motor current was proposed for turning process. In order to take more reliable current signal, cutting force signal was compared as reference signal because cutting force signal is reliable, and analysis of signal correlation between cutting force and motor current was performed. The static components of the cutting force and motor current signals were correlated very well for different cutting conditions, and it was proven to use the motor current as an proper sensor for monitoring of tool fracture. To understand the characteristics of motor current, various kinds of cutting experiment were performed including tool fracture experiments. As a result, a new method to detect tool fracture using motor current in turing was proposed, and a large number of fracture experiments were carried out to evaluate the reliability of the proposed method. Finally, it can be possible to detect the tool fracture reliably.

Design of New Built-ln Current Sensor for On-Line Testing (On-line 테스팅을 위한 새로운 내장형 전류 감지 회로의 설계)

  • Gwak, Cheol-Ho;Kim, Jeong-Beom
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.38 no.7
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    • pp.493-502
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    • 2001
  • This paper propose a new built-in current sensor(BICS) for current testing that has some advantages compared with conventional logic testing. The designed BICS detects the fault in circuit under test (CUT) and makes a Pass/Fail signal by comparison between CUT current and duplicated inverter current. The proposed circuit consists of a differential amplifier, a comparator and a inverter. It requires 10 MOSFETs and 3 inverters. Since the designed BICS do not require the extra clock, the added extra pin is only one output pin. The mode selection is not used in this circuit. Therefore we can apply the circuit to on-line testing. The validity and effectiveness are verified through the HSPICE simulation of circuits with defects. When CUT is a 8$\times$8 parallel multiplier, area overhead of the BICS is about 4.34%.

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A study on New Non-Contact MR Current Sensor for the Improvement of Reliability in CMOS VLSI (CMOS회로의 신뢰도 향상을 위한 새로운 자기저항소자 전류감지기 특성 분석에 관한 연구)

  • 서정훈
    • Journal of the Korea Society of Computer and Information
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    • v.6 no.1
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    • pp.7-13
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    • 2001
  • As the density of VLSI increases, the conventional logic testing is not sufficient to completely detect the new faults generated in design and fabrication processing. Recently. IDDQ testing becomes very attractive since it can overcome the limitations of logic testing. This paper presents a new BIC for the internal current test in CMOS logic circuit. Our circuit is composed of Magnetoresistive current sensor, level shifter, comparator, reference voltage circuit and a circuit be IDDQ tested as a kind of self-testing fashion by using the proposed BIC.

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LDO regulator with improved regulation characteristics using gate current sensing structure (게이트 전류 감지 구조를 이용한 향상된 레귤레이션 특성의 LDO regulator)

  • Jun-Mo Jung
    • Journal of IKEEE
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    • v.27 no.3
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    • pp.308-312
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    • 2023
  • The gate current sensing structure was proposed to more effectively control the regulation of the output voltage when the LDO regulator occurs in an overshoot or undershoot situation. In a typical existing LDO regulator, the regulation voltage changes when the load current changes. However, the operation speed of the pass transistor can be further improved by supplying/discharging the gate terminal current in the pass transistor using a gate current sensing structure. The input voltage of the LDO regulator using the gate current sensing structure is 3.3 V to 4.5 V, the output voltage is 3 V, and the load current has a maximum value of 250 mA. As a result of the simulation, a voltage change value of about 12 mV was confirmed when the load current changed up to 250 mA.

The Implementation of Active Leakage Current Detecting Algorithm based on 16 bit Signal Processor (16비트 신호처리 프로세서 기반 유효성분 누설전류 감지 알고리즘 구현)

  • Han, Young-Oh
    • The Journal of the Korea institute of electronic communication sciences
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    • v.11 no.6
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    • pp.605-610
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    • 2016
  • The ELCB(: Earth Leakage Circuit Breaker) is the only way being used to prevent accidents from happening caused by electrical disaster. However, the existing ELCB has a limit to prevent damages to life and property due to a electric fire and a human body electric shock caused by the resistive leakage current, because of detecting the total leakage current in the block range of 15mA~30mA. It also has problems such as reduced productivity and reliability due to malfunctions by capacitive leakage currents. In this study, we have implemented the algorithm for the resistive leakage current detection technique and developed the resistive leakage current detection module based on a MSP430 processor, 16bit signal processor and this module can be operated in a desired block threshold within 0.03 seconds as specified in KS C 4613.

Design of high sensitivity sense amplifier with self-bias circuit for CCD image sensor (CCD Image Sensor에서 전압분배회로가 있는 고감도 감지회로의 설계)

  • 김용국
    • Journal of the Microelectronics and Packaging Society
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    • v.5 no.2
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    • pp.65-69
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    • 1998
  • 본 연구는 전하 결합 영양소자에서 감지회로의 특성을 향상시키기 위하여 N형 MOSFET과 Polysilcon 저항에 의한 전압 분배 회로를 가진 감지회로를 설계하였다. 감지회 로에 흐르는 전류는 전압분배회로를 N형 MOSFET으로 설계하였을때가 Polysilicon 저항으 로 설계한 경우보다 감도 특성도 좋은 것으로 나타났다. 이는 전압분배회로를 Polysilicon으 로 설계한 경우보다 N형 MOSFET으로 설계하였을 때 동작 주파수가 높을수록 전압이득 특성이 우수하기 때문이다. 감지회로에 흐르는 전류는 전압분배회로를 N형 MOSFET으로 설계하였을 때 2mA 정도를 나타내고 polysilcon으로 설계하였을 때 4mAwjd도로 나타났다.

Design of a Built-In Current Sensor for CMOS IC Testing (CMOS 집적회로 테스팅을 위한 내장형 전류 감지 회로 설계)

  • Kim, Tae-Sang;Hong, Seung-Ho;Kwak, Chul-Ho;Kim, Jeong-Beam
    • Journal of IKEEE
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    • v.9 no.1 s.16
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    • pp.57-64
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    • 2005
  • This paper presents a built-in current sensor(BICS) that detects defects in CMOS integrated circuits using the current testing technique. This circuit employs a cross-coupled connected PMOS transistors, it is used as a current comparator. The proposed circuit has a negligible impact on the performance of the circuit under test (CUT) and high speed detection time. In addition, in the operation of the normal mode, the BlCS does not have dissipation of extra power, and it can be applied to the deep submicron process. The validity and effectiveness are verified through the HSPICE simulation on circuits with defects. The area overhead of a BlCS versus the entire chip is about 9.2%. The chip was fabricated with Hynix $0.35{\mu}m$ 2-poly 4-metal N-well CMOS standard technology.

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Development of mA Level Active Leakage Current Detecting Module (mA급 유효성분 누설전류 감지 모듈 개발)

  • Han, Young-Oh
    • The Journal of the Korea institute of electronic communication sciences
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    • v.12 no.1
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    • pp.109-114
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    • 2017
  • In this study, we have developed the active leakage current detection module based on a MSP430 processor, 16bit signal processor. This module can be operated in a desired trip threshold within 0.03 seconds as specified in KS C 4613. This developed module is expected to be applicable as a module for prevention of electric shock in smart distribution panel of smart grid.

Switch Open Fault Detection and Tolerant Method for Three Phase PWM Rectifier (3상 PWM 정류기의 스위치 개방 고장시 감지 및 허용운전 방법)

  • Shin, Hee-Kuen;An, Byoung-Woong;Kim, Hag-Wone;Cho, Kwan-Yuhl;Lim, Byung-Kuk;Jung, Shin-Myung
    • Proceedings of the KIPE Conference
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    • 2011.11a
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    • pp.18-19
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    • 2011
  • 본 논문에서는 3상 PWM 정류기의 스위치 개방 고장시 감지 및 허용 운전 방법에 대해 제안한다. 스위치의 개방 고장이 발생 하면, 한상의 전류가 반주기 동안 나타나지 않기 때문에 출력 직류전압의 리플로 나타나게 된다. 이경우 고장 감지 및 허용 운전을 하지 않으면, 전력 품질을 저하되며, 직류 링크 콘덴서의 수명이 감축되는 문제를 발생 시킨다. 제안된 기법은 추가적인 하드웨어 없이 간단한 모델 적응 제어 (Model Reference Adaptive System)을 이용하여, 고장된 스위치를 감지 하며, 고장난 스위치의 반대 스위치를 켜고 나머지 2상을 전류제어 하여 3상 전류를 평형상태로 만들어 출력 직류전압의 리플을 줄이는 허용운전을 제안한다. 본 논문은 6kW급 3상 PWM 정류기 시스템을 모의해석을 통해 제안된 기법의 타당성을 입증 하였다.

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Specification-based Analog Circuits Test using High Performance Current Sensors (고성능 전류감지기를 이용한 Specification 기반의 아날로그 회로 테스트)

  • Lee, Jae-Min
    • Journal of Korea Multimedia Society
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    • v.10 no.10
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    • pp.1260-1270
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    • 2007
  • Testing and diagnosis of analog circuits(or mixed-signal circuits) continue to be a hard task for test engineers and efficient test methodologies to solve these problems are needed. This paper proposes a novel analog circuits test technique using time slot specification (TSS) based built-in current sensors (BICS). A technique for location of a fault site and separation of fault type based on TSS is also presented. The proposed built-in current sensors and TSS technique has high testability, fault coverage and a capability to diagnose catastrophic faults and parametric faults in analog circuits. In order to reduce time complexity of test point insertion procedure, external output and power nodes are used for test points and the current sensors are implemented in the automatic test equipment(ATE). The digital output of BICS can be easily combined with built-in digital test modules for analog IC test.

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