• Title/Summary/Keyword: 전계효과트랜지스터

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화학기상증착 방법으로 성장된 $SnO_2$ 나노선의 특성 분석: 성장 온도와 산소유량에 따른 구조와 전기특성

  • Kim, Yun-Cheol;Ha, Jeong-Suk
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.71-71
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    • 2010
  • 최근 나노선의 우수한 전기적, 광학적 특성을 다양한 종류의 전자소자, 광소자, 그리고 센서에 응용하는 연구가 활발히 진행되고 있다. 그 중 $SnO_2$ 나노선은 n-type의 전기특성과 우수한 광 특성을 보이며, 전자소자, 광소자 뿐 아니라 다양한 종류의 가스 센서 제작에 널리 사용되고 있다. 본 연구에서는 화학기상증착법 (Chemical Vapor Deposition)으로 $SnO_2$ 나노선을 성장하여 전계방출효과 트랜지스터 (field effect transistor: FET)를 제작하여 전기적 특성을 측정하였다. 나노선의 성장 조건 (온도와 산소 유량) 에 따른 나노선의 구조, 화학조성, 전기적 특성을 체계적으로 조사하였다. 산소의 유량이 낮을 때는 온도에 따라 나노선의 크기와 전기 특성에 변화가 없었으나, 산소의 유량을 높이면 온도에 따라 나노선의 두께와 전기적 특성이 크게 변화하였다. 본 연구에서는 특히, FET 구조에서 on/off current ratio 가 $10^5$ 이상으로 매우 높은 나노선 제작이 가능하였다. 전기적 특성과 나노선의 결정구조, 화학적 조성을 함께 비교하여 성장 메커니즘을 이해하고자 한다.

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Synthesis of Graphene Nanoribbon via Ag Nanowire Template

  • Lee, Su-Il;Kim, Yu-Seok;Song, U-Seok;Kim, Seong-Hwan;Jeong, Sang-Hui;Park, Sang-Eun;Park, Jong-Yun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.565-565
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    • 2012
  • 그래핀(Graphene) 기반의 전계효과 트랜지스터(Field effect transistor) 응용에 있어, 가장 핵심적인 도전과제중 하나는 에너지 밴드갭(Energy bandgap)을 갖는 그래핀 채널의 제작이다. 그래핀은 에너지 밴드갭이 존재하지 않는 반금속(semi metal)의 특성을 지니고 있어, 그 본래의 물리적 특성을 지니고서는 소자구현에 어려움이 있다. 그러나 폭이 수~수십 나노미터인 그래핀 나노리본(Graphene nanoribbon)의 경우 양자구속효과(Quantum confinement effect)에 의하여 에너지 밴드갭이 형성되며, 갭의 크기는 리본의 폭에 반비례한다는 연구결과가 보고된 바 있다. 이러한 이유에서, 효과적이며 실현가능한 그래핀 나노리본의 제작은 필수적이다. 본 연구에서는 은 나노 와이어(Ag nanowire)를 기반으로 한 그래핀 나노리본의 합성을 연구하였다. 은 나노와이어를 열화학 기상증착법(Thermal chemical vapor deposition)을 이용, 아세틸렌(Acetylene, C2H2) 가스를 탄소공급원으로 하여 그래핀을 나노와이어 표면에 합성하였다. 합성과정에서 구조에 영향을 미치는 요인인 합성온도와 가스의 비율, 압력 등을 조절하여 최적화된 합성조건을 확립하였다. 합성된 나노리본의 특성을 라만분광법(Raman spectroscopy)과 주사전자 현미경(Scanning electron microscopy), 투과전자현미경(Transmission electron microscopy), 원자힘 현미경(Atomic force microscopy)를 통하여 분석하였다.

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The characteristics of source/drain structure for MOS typed device using Schottky barrier junction (Schottky 장벽 접합을 이용한 MOS형 소자의 소오스/드레인 구조의 특성)

  • 유장열
    • Journal of the Korean Institute of Telematics and Electronics T
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    • v.35T no.1
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    • pp.7-13
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    • 1998
  • The VLSI devices of submicron level trend to have a lowering of reliability because of hot carriers by two dimensional influences which are caused by short channel effects and which are not generated in a long channel devices. In order to minimize the two dimensional influences, much research has been made into various types of source/drain structures. MOS typed tunnel transistor with Schottky barrier junctions at source/drain, which has the advantages in fabrication process, downsizing and response speed, has been proposed. The experimental device was fabricated with p type silicon, and manifested the transistor action, showing the unsaturated output characteristics and the high transconductance comparing with that in field effect mode. The results of trial indicate for better performance as follows; high doped channel layer to lower the driving voltage, high resistivity substrate to reduce the leakage current from the substrate to drain.

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Effects of Hot-Carrier Stress and Constant Current Stress on the Constant Performance Poly-Si TFT with a Single Perpendicular Grain Boundary (단일 수직형 그레인 경계 (Single Perpendicular Grain Boundary) 구조를 가지는 고성능 다결정 실리콘 박막 트랜지스터(Poly-Si TFT)에서의 고온 캐리어 스트레스(Hot Carrier Stress) 및 정전류 스트레스(Constant Current Stress) 효과)

  • Choi, Sung-Hwan;Song, In-Hyuk;Shin, Hee-Sun;Han, Min-Koo
    • Proceedings of the KIEE Conference
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    • 2006.10a
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    • pp.50-52
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    • 2006
  • 본 논문은 고성능 다결정 실리콘(Poly-Si) 박막 트랜지스터 (Thin Film Transistor)에서 단일 수직 그레인 경계(Single Perpendlcular Grain Boundary)가 고온 캐리어 스트레스(Hot Carrier Stress) 및 정전류 안정성 평가에서 어떠한 효과를 보이는가에 대해서 살펴보았다. 고온 캐리어 스트레스 하에서($V_G=V_{TH}+1V,\;V_D$ =12V),그레이 경계가 없는 다결정 실리콘 TFT와 비교했을 때 그레인 경계를 가지고 있는 다결정 실리를 TFT는 전기 전도(Electric Conduction)에 작용하는 자유 캐리어(Free Carrier)의 개수가 적기 때문에 상대적으로 더욱 우수한 전기적 특성을 나타낸다. 먼저 1000초 동안 고온 캐리어 스트레스를 가해준 결과 단일 그레인 경계를 가진 다결정 실리콘에서의 트랜스 컨덕턴스(Transconductance)의 이동 정도는 5% 미만으로 확인되었다. 반면에 같은 스트레스 조건 하에서 그레인 경계가 존재하지 않는 다결정 실리콘의 경우에는 그 이동 정도가 약 25%에 달하는 것으로 측정되었다. 다음으로 정전류 스트레스(Constant Current Stress) 인가시, 수직형 그레인 경계가 채널 영역 내에 존재하지 않는 다결정 실리콘 TFT는 드레인 접합 부분의 전계 세기를 비교했을 때, 그레인 경계를 가지고 있는 다결정 실리콘 TFT보다 상대적으로 낮은 원 인 때문에 적게 열화되는(Degraded) 특성을 확인할 수 있었다.

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Measurements of the Temperature Coefficient of Resistance of CVD-Grown Graphene Coated with PEI (PEI가 코팅된 CVD 그래핀의 저항 온도 계수 측정)

  • Soomook Lim;Ji Won Suk
    • Composites Research
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    • v.36 no.5
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    • pp.342-348
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    • 2023
  • There has been increasing demand for real-time monitoring of body and ambient temperatures using wearable devices. Graphene-based thermistors have been developed for high-performance flexible temperature sensors. In this study, the temperature coefficient of resistance (TCR) of monolayer graphene was controlled by coating polyethylenimine (PEI) on graphene surfaces to enhance its temperature-sensing performances. Monolayer graphene grown by chemical vapor deposition (CVD) was wet-transferred onto a target substrate. To facilitate the interfacial doping by PEI, the hydrophobic graphene surface was altered to be hydrophilic by oxygen plasma treatments while minimizing defect generation. The effect of PEI doping on graphene was confirmed using a back-gated field-effect transistor (FET). The CVD-grown monolayer graphene coated with PEI exhibited an improved TCR of -0.49(±0.03) %/K in a temperature range of 30~50℃.

Effect of Organic Solvent-Modification on the Electrical Characteristics of the PCBM Thin-Film Transistors on Plastic substrate (플라스틱 기판상에 제작된 PCBM 박막 트랜지스터의 전기적 특성에 대한 유기 용매 최적화의 효과에 대한 연구)

  • Hyung, Gun-Woo;Lee, Ho-Won;Koo, Ja-Ryong;Lee, Seok-Jae;Kim, Young-Kwan
    • Journal of the Korean Applied Science and Technology
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    • v.29 no.2
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    • pp.199-204
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    • 2012
  • Organic thin-film transistors (OTFTs) have received considerable attention because their potential applications for nano-scale thin-film structures have been widely researched for large-scale integration industries, such as semiconductors and displays. However, research in developing n-type materials and devices has been relatively shortage than developing p-type materials. Therefore, we report on the fabrication of top-contact [6,6]-phenyl-C61-butyricacidmethylester (PCBM) TFTs by using three different solvent, o-dichlorobenzene, toluene and chloroform. An appropriate choice of solvent shows that the electrical characteristics of PCBM TFTs can be improved. Moreover, our PCBM TFTs with the cross-linked Poly(4-vinylphenol) dielectric layer exhibits the most pronounced improvements in terms of the field-effect mobility (${\sim}0.034cm^2/Vs$) and the on/off current ratio (${\sim}1.3{\times}10^5$) for our results. From these results, it can be concluded that solvent-modification of an organic semiconductor in PCBM TFTs is useful and can be extended to further investigations on the PCBM TFTs having polymeric gate dielectrics. It is expected that process optimizations using solution-processing of organic semiconductor materials will allow the development of the n-type organic TFTs for low-cost electronics and various electronic applications.

High-performance WSe2 field-effect transistors fabricated by hot pick-up transfer technique (핫픽업 전사기술을 이용한 고성능 WSe2 기반 전계효과 트랜지스터의 제작)

  • Kim, Hyun Ho
    • Journal of Adhesion and Interface
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    • v.21 no.3
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    • pp.107-112
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    • 2020
  • Recently, the atomically thin transition-metal dichalcogenide (TMD) semiconductors have attracted much attention owing to their remarkable properties such as tunable bandgap with high carrier mobility, flexibility, transparency, etc. However, because these TMD materials have a significant drawback that they are easily degraded in an ambient environment, various attempts have been made to improve chemical stability. In this research article, I report a method to improve the air stability of WSe2 one of the TMD materials via surface passivation with an h-BN insulator, and its application to field-effect transistors (FETs). With a modified hot pick-up transfer technique, a vertical heterostructure of h-BN/WSe2 was successfully made, and then the structure was used to fabricate the top-gate bottom-contact FETs. The fabricated WSe2-based FET exhibited not only excellent air stability, but also high hole mobility of 150 ㎠/Vs at room temperature, on/off current ratios up to 3×106, and 192 mV/decade of subthreshold swing.

Organo-Compatible Gate Dielectrics for High-performance Organic Field-effect Transistors (고성능 유기 전계효과 트랜지스터를 위한 유기친화 게이트 절연층)

  • Lee, Minjung;Lee, Seulyi;Yoo, Jaeseok;Jang, Mi;Yang, Hoichang
    • Applied Chemistry for Engineering
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    • v.24 no.3
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    • pp.219-226
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    • 2013
  • Organic semiconductor-based soft electronics has potential advantages for next-generation electronics and displays, which request mobile convenience, flexibility, light-weight, large area, etc. Organic field-effect transistors (OFET) are core elements for soft electronic applications, such as e-paper, e-book, smart card, RFID tag, photovoltaics, portable computer, sensor, memory, etc. An optimal multi-layered structure of organic semiconductor, insulator, and electrodes is required to achieve high-performance OFET. Since most organic semiconductors are self-assembled structures with weak van der Waals forces during film formation, their crystalline structures and orientation are significantly affected by environmental conditions, specifically, substrate properties of surface energy and roughness, changing the corresponding OFET. Organo-compatible insulators and surface treatments can induce the crystal structure and orientation of solution- or vacuum-processable organic semiconductors preferential to the charge-carrier transport in OFET.

Comparative Investigation on 4 types of Tunnel Field Effect Transistors(TFETs) (터널링 전계효과 트랜지스터 4종류 특성 비교)

  • Shim, Un-Seong;Ahn, TaeJun;Yu, YunSeop
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.5
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    • pp.869-875
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    • 2017
  • Using TCAD simulation, performances of tunnel field-effect transistors (TFETs) was investigated. Drain current-gate voltage types of TFET structure such as single-gate TFET (SG-TFET), double-gate TFET (DG-TFET), L-shaped TFET (L-TFET), and Pocket-TFET (P-TFET) are simulated, and then as dielectric constant of gate oxide and channel length are varied their subthreshold swing (SS) and on-current ($I_{on}$) are compared. On-currents and subthreshold swings of the L-TFET and P-TFET structures with high electric constant and line tunneling were 10 times and 20 mV/dec more than those of the SG-TFET and DG-TFET using point tunneling, respectively. Especially, it is shown that hump effect which dominant current element changes from point tunneling to line tunneling, is disappeared in P-TFET with high-k gate oxide such as $HfO_2$. The analysis of 4 types of TFET structure provides guidelines for the design of new types of TFET structure which concentrate on line tunneling by minimizing point tunneling.

AlGaN/GaN Field Effect Transistor with Gate Recess Structure and HfO2 Gate Oxide (게이트 하부 식각 구조 및 HfO2 절연층이 도입된 AlGaN/GaN 기반 전계 효과 트랜지스터)

  • Kim, Yukyung;Son, Juyeon;Lee, Seungseop;Jeon, Juho;Kim, Man-Kyung;Jang, Soohwan
    • Korean Chemical Engineering Research
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    • v.60 no.2
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    • pp.313-319
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    • 2022
  • AlGaN/GaN based HfO2 MOSHEMT (metal oxide semiconductor high electron transistor) with different gate recess depth was simulate to demonstrate a successful normally-off operation of the transistor. Three types of the HEMT structures including a conventional HEMT, a gate-recessed HEMT with 3 nm thick AlGaN layer, and MIS-HEMT without AlGaN layer in the gate region. The conventional HEMT showed a normally-on characteristics with a drain current of 0.35 A at VG = 0 V and VDS = 15 V. The recessed HEMT with 3 nm AlGaN layer exhibited a decreased drain current of 0.15 A under the same bias condition due to the decrease of electron concentration in 2DEG (2-dimensional electron gas) channel. For the last HEMT structure, distinctive normally- off behavior of the transistor was observed, and the turn-on voltage was shifted to 0 V.