• Title/Summary/Keyword: 임베디드 테스팅

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Automated Testing System Using AUTOSAR XML (AUTOSAR XML을 이용한 테스팅 자동화 시스템 개발)

  • Kum, Daehyun;Lee, Seonghun;Park, Gwangmin;Cho, Jeonghun
    • IEMEK Journal of Embedded Systems and Applications
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    • v.4 no.4
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    • pp.156-163
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    • 2009
  • Recently a standard software platform for automotive, AUTOSAR, has been developed to manage growing software complexity and improve software reuseability. However reuse of testing system and test data are difficult because they are dependant on implementation language and testing phases. In this paper, we suggest a automated testing approach for AUTOSAR software component using a standardized testing language, TTCN-3. AUTOSAR defines the AUTOSAR XML Schema for the data exchange format so that it is possible to automatically convert AUTOSAR model into TTCN-3 testing model. Therefore our approach is to present generation techniques for the TTCN-3 testing system from a AUTOSAR XML description. With the proposed testing techniques we can reduce time and effort to build the testing system and reuse testing environment.

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A Hierarchical Checklist to Automatically Generate Test Scripts (테스트 스크립트 자동 생성을 위한 계층 구조 체크리스트)

  • Kim, Dae Joon;Chung, Ki Hyun;Choi, Kyung Hee
    • KIPS Transactions on Software and Data Engineering
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    • v.6 no.5
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    • pp.245-256
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    • 2017
  • This paper proposes a method to generate test scripts for testing embedded system in an easy manner by using hierarchical checklist. In the proposed method, a checklist is constructed with event, component and command dictionaries. And the test scripts are hierarchically generated based on the dictionaries. Since the physical layer of system input becomes abstract with component layer and event layer by virtue of the hierarchy, It is possible to generate test scripts without complicated system input information. It is easy to generate test scripts for embedded systems with similar inputs using the highly reusable dictionaries. The effectiveness of the proposed method is demonstrated with experiments.

A Design of Static Meta-Model for Reuse Framework of Embedded System (임베디드 시스템의 재사용 프레임워크를 위한 정적 메타모델 설계)

  • Cho, Eun-Sook;Kim, Chul-Jin;Lee, Sook-Hee
    • Journal of Korea Multimedia Society
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    • v.12 no.2
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    • pp.231-243
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    • 2009
  • Currently interests of embedded software in various areas such as automotive field, ship field, robot field is increasing according to expand market of embedded systems. Various researches such as embedded operating systems, embedded software modeling technique, embedded software testing, and so on are going in progress. However systematic engineering approach in embedded system development is poor because embedded areas focus on hardware parts until now. Furthermore, framework-based de sign technique considering reusability is not reflected in embedded system development. Those development results in many of dead codes scattered in system, and results in poor reusability of system. This paper suggests a framework of embedded system for reusability and a static meta-model for reuse framework. Proposed meta-model expresses not only the structure of reuse framework, but also allows a designer to extend and design easily models of embedded system based on reuse framework according to various embedded system types.

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Architecture for Simulink/Stateflow Model Based Test Case Generation Considering Feedback (피드백을 고려한 테스트 케이스 생성 시스템 구조)

  • Choi, WooWon;Chung, Kihyun;Choi, Kyunghee
    • KIPS Transactions on Software and Data Engineering
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    • v.6 no.7
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    • pp.361-370
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    • 2017
  • This paper proposes the architecture of test case generator that can generate test cases, considering feedback signals from subsystems controlled by an embedded system. In general, a closed system decides the next test input to its subsystem under its control referencing feedback signals from its subsystem. In such systems, it is hard to use the typical test cases generated without referencing feedback. The architecture proposed in this paper re-produces test cases in real time using feedback signals. The architecture is implemented and its effectiveness is verified through experimenting a demo system.

Fault Localization Method by Utilizing Memory Update Information and Memory Partitioning based on Memory Map (메모리 맵 기반 메모리 영역 분할과 메모리 갱신 정보를 활용한 결함 후보 축소 기법)

  • Kim, Kwanhyo;Choi, Ki-Yong;Lee, Jung-Won
    • Journal of KIISE
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    • v.43 no.9
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    • pp.998-1007
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    • 2016
  • In recent years, the cost of automotive ECU (Electronic Control Unit) has accounted for more than 30% of total car production cost. However, the complexity of testing and debugging an automotive ECU is increasing because automobile manufacturers outsource automotive ECU production. Therefore, a large amount of cost and time are spent to localize faults during testing an automotive ECU. In order to solve these problems, we propose a fault localization method in memory for developers who run the integration testing of automotive ECU. In this method, memory is partitioned by utilizing memory map, and fault-suspiciousness for each partition is calculated by utilizing memory update information. Then, the fault-suspicious region for partitions is decided based on calculated fault-suspiciousness. The preliminary result indicated that the proposed method reduced the fault-suspicious region to 15.01(%) of memory size.

Fault Test Algorithm for MLC NAND-type Flash Memory (MLC NAND-형 플래시 메모리를 위한 고장검출 테스트 알고리즘)

  • Jang, Gi-Ung;Hwang, Phil-Joo;Chang, Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.49 no.4
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    • pp.26-33
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    • 2012
  • As the flash memory has increased the market share of data storage in imbedded system and occupied the most of area in a system, It has a profound impact on system reliability. Flash memory is divided NOR/NAND-type according to the cell array structure, and is classified as SLC(Single Level Cell)/MLC(Multi Level Cell) according to reference voltage. Although NAND-type flash memory is slower than NOR-type, but it has large capacity and low cost. Also, By the effect of demanding mobile market, MLC NAND-type is widely adopted for the purpose of the multimedia data storage. Accordingly, Importance of fault detection algorithm is increasing to ensure MLC NAND-type flash memory reliability. There are many researches about the testing algorithm used from traditional RAM to SLC flash memory and it detected a lot of errors. But the case of MLC flash memory, testing for fault detection, there was not much attempt. So, In this paper, Extend SLC NAND-type flash memory fault detection algorithm for testing MLC NAND-type flash memory and try to reduce these differences.

A Trend of Device Driver Development Tool (디바이스 드라이버 개발 도구 동향)

  • LIm, C.D.;Kim, T.H.;Kim, J.S.;Ma, Y.S.;Kwon, W.I.;Choi, Y.H.
    • Electronics and Telecommunications Trends
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    • v.21 no.1 s.97
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    • pp.44-56
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    • 2006
  • 임베디드 소프트웨어(embedded software)에서 디바이스 드라이버(device driver)는 하드웨어와 운영체제 및 응용 프로그램 사이의 연결고리 역할을 하는 핵심 구성 요소로서, 응용 프로그램이 하드웨어에서 제공하는 기능을 사용할 수 있도록 제어 및 상호동작을 위한 일관된 인터페이스를 제공하는 소프트웨어이다. 이러한 디바이스 드라이버는 하드웨어와 소프트웨어의 양쪽 측면에 모두 관련이 있어서 개발이 어렵기 때문에 개발을 지원하는 도구가 필요하다. 본 원고에서는 디바이스 드라이버 개발 도구가 갖추어야 할 기능을 크게 소스 코드 자동생성 기능, 테스팅 기능, 정형 검증 기능, 통합 개발 환경 및 개발 편의 유틸리티 기능으로 나누어서 각각의 기술에 대해서 살펴보고, 현재 상용 제품들을 살펴보았다. 그리고, ETRI의 본 연구팀에서 개발한 디바이스 드라이버 통합 개발 도구인 “QuickDriver”를 기술하고, 이 도구와 상용 제품과의 비교를 수행하였다.

A Study on Embedded System Simultaneous Design and Development Tool (임베디드 시스템 동시설계 개발도구를 위한 연구)

  • Ahn, SungSoon;Lee, Jeong-Bae;Lee, Young-Ran
    • Proceedings of the Korea Information Processing Society Conference
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    • 2009.11a
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    • pp.33-34
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    • 2009
  • 임베디드 시스템 제품의 생명주기가 짧아짐에 따라서 개발시간을 단축하기 위한 많은 방법들이 나타나고 시도되었다. 그런 방법 중 프로토타이핑 방법은 개발할 제품을 모형으로 만들어 봄으로써 요구사항단계와 설계단계에서 시간을 절약할 수 있게되어 전체 개발시간의 단축을 이끌어내었다. 본 논문에서는 H/W의 디바이스들을 S/W에서 선택하여 시스템을 완성시킬 수 있는 DDEPS를 제안하여 개발과 테스팅단계에서 시간을 절약하여 전체 개발시간의 단축이 됨을 보인다.

A Method for Improving Interface Fault Tolerance in the Embedded Software (임베디드 소프트웨어의 인터페이스 결함허용성 향상 기법)

  • Choi, In Hwa;Paik, Jong Ho;Hwang, Jun
    • Journal of Internet Computing and Services
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    • v.14 no.1
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    • pp.31-39
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    • 2013
  • Generally, there can be a interface discrepancy between the legacy hardware and the new software in combining new software component with reused hardware components in the embedded system. This kind of the interface discrepancy may cause various types of faults and also result in declining interface fault tolerance. In this paper we propose a method to improve interface fault tolerance. First of all, the new interface discrepancy fault type which has not been dealt with before is to be defined and next the testing method for generating test paths is proposed by considering the new defined interface discrepancy fault type in this paper. Several tests show that the proposed method detects more fatal faults about 7.9% in comparison with the existing testing method for commercial broadcasting receiver. Since the proposed method can provide software developers with test paths to be available earlier on the software development cycle, in addition, software developers can regard on interface discrepancy fault in advance. Consequently, more efficient test planning can be established to improve the interface fault tolerance.

A Method to Automatically Generate Test Scripts from Checklist for Testing Embedded System (임베디드 시스템 테스팅을 위한 체크리스트로부터 테스트 스크립트 자동 생성 방안)

  • Kang, Tae Hoon;Kim, Dae Joon;Chung, Ki Hyun;Choi, Kyung Hee
    • KIPS Transactions on Software and Data Engineering
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    • v.5 no.12
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    • pp.641-652
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    • 2016
  • This paper proposes a method to generate test scripts in an automatic manner, based on checklist used for testing embedded systems in the fields. The proposed method can reduce the mistakes which may be introduced during manual generation. In addition, it can generate test scripts to test various mode combinations, which is not possible to be tested by the typical checklist. The test commands in a checklist are transformed into a test script suit referencing the signal values defined in a test command dictionary. In addition, the method to generate test scripts in sequential, double permutation and random manners is proposed useful to test the inter-operations between modes, a series of operations for a specific behavior. The proposed method is implemented and the feasibility is shown through the experiments.